標題: 具有奈米點摻雜與背通道效應之高效能非晶銦鎵鋅氧薄膜電晶體
High Performance Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistor with Nano-Dot Doping and Back Channel Effect
作者: 陳家新
Chen, Chia-Hsin
冉曉雯
蔡娟娟
Zan, Hsiao-Wen
Tsai, Chuang-Chuang
光電工程學系
關鍵字: 薄膜電晶體;銦鎵鋅氧化物;頂閘極;TFT;IGZO;top-gate
公開日期: 2010
摘要: 非晶氧化金屬半導體的高載子移動率(~10 cm2/Vs)比起傳統的非晶矽半導體而言,由於具有較低的工作電壓(<5V),以及其小的次臨界電壓擺幅,近年來被視為深具潛力的半導體材料。然而非晶氧化銦鎵鋅薄膜電晶體如果想發展低功率損耗、高頻率操作的電路,則增加其載子移動率,並降低其寄生電容是必要的。本研究以一個新穎的製程結構來提高出a-IGZO TFTs的載子移動率,並提出一個有效的製程方法-奈米點摻雜(Nano-dot doping)在通道上,來獲得一個高載子移動率的a-IGZO TFTs。本論文完整呈現出不同的點濃度與點摻雜濃度,對於元件通道上所造成的效應。我們將製程流程分成頂閘極與底閘極結構,並個別對不同結構的元件做電性分析比對,希望能從中釐清出a-IGZO TFTs在載子移動率提高的機制。元件簡單分成:有/無奈米點摻雜(W/O NDD)。在元件製作中,利用聚苯乙烯小球自我聚集的特性,在介電層上方形成多孔性的遮罩,接著,利用幾個簡單的製程,則具有奈米點的圖案化閘極就此產生,之後利用氬電漿對a-IGZO做處理,使得沒有閘極覆蓋下的主動層形成高導電率區域,如此一來,具有奈米點摻雜的a-IGZO TFTs即將完成。同時也實行了自我對準,來抑制閘極與源/汲極之間的寄生電容。我們利用NDD 製程的a-IGZO TFTs得到了不錯的特性參數包括:電子遷移率~80cm2/(V-s),次臨界擺幅~1V/dec. 以及開關比~106。另外,我們也利用紫外光取代氬電漿的摻雜,再次成功的驗證奈米點摻雜(Nano-dot doping)效果。 此外,在本研究中也發現藉由覆蓋層SiOx的引入會造成載子移動率大幅的提升,推測是IGZO主動層中的氧轉移至覆蓋層SiOx上,使得IGZO形成氧空缺,載子濃度大幅提高,導致載子移動率變大。因此,我們提出一個加入SiOx做為覆蓋層的結構來提升元件的特性而不會造成元件效能的折損與漏電,此法可作為一簡單而有效的製程來提升元件效能。
With a high mobility (>10 cm2/Vs) than conventional amorphous silicon semiconductor and a low operating voltage (< 5 V) and small sub-threshold voltage swing, amorphous In-Ga-Zn-O thin-film transistors (a-IGZO TFTs) draw a lot of attentions. However, when a-IGZO TFTs are developed for low-power consumption, high-frequency operating of circuit, improved electron mobility and a low parasitic capacitance are required. In this study, we used a novel, simple process to improve the mobility of the a-IGZO TFTs, and proposed an efficient manufacturing method to obtain a high carrier mobility of a-IGZO TFTs, called “nano-dot doping”. The influences of dot and doping concentrations on device performance are investigated. We applied the top gate and bottom gate structure to analyze and compare the different of electric characteristic to clarify the a-IGZO TFTs increase in carrier mobility mechanism. Self-organized polystyrene spheres with diameters of 200 nm are utilized to form a dot-like mask on the gate dielectric. Following a few simple process steps, the dot-like pattern is transferred to produce dot-like doping on the IGZO channel region. After using argon plasma treatment, the bared region of active layer became high conductivity region. Therefore, a nano dot-doping a-IGZO TFTs is completed. Self-aligned a-IGZO TFT is also realized to suppress the parasitic capacitance between gate and source/drain. With NDD process, the optimized electric characteristic of a-IGZO TFT was attained with field-effect mobility ~79cm2/(V-s), sub-threshold swing ~1V/dec., and on/off ratio ~106. Furthermore, we utilize ultraviolet rays to replace argon plasma and successfully demonstrate the effect of nano-dot doping. In addition, this thesis found the carrier mobility significantly increase by silicon oxide (SiOx) capping. We presume that the oxygen in IGZO films be captured by silicon oxide and transfer to the oxide surface or bulk. Therefore the oxygen vacancy is created to dramatically increase the carrier concentration and leaded the mobility significantly improved. In this study, we propose a novel structure with capping silicon oxide layer onto the active layer of bottom-gate a-IGZO TFT to provide a powerful solution of enhancement of device performance that would not cause current leakage and performance degradation. In summary, the method of oxide capping layer is a simple and effective approach to fabricate a feasible metal oxide transistor.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079824552
http://hdl.handle.net/11536/47576
顯示於類別:畢業論文