具高轉換效率與高均流控制之交錯式升壓型轉換器

Abstract

近年來，IT產業技術快速發展，輕量化、薄形化和高效能已然成為智慧型手機、平板電腦等可攜式電子產品必備的規格。然而輕量化、薄形化和高效能產生了許多產品設計上的困擾。為了比傳統的電壓或電流控制的轉換器在負載電流變化時能有更短的暫態反應時間，可以增加切換頻率來達到快速反應的目的。但是增加切換頻率會產生更大的功率消耗、低轉換效能以及縮短電池的壽命。此外切換時損失的能量會產生熱能，降低功率電晶體的可靠度使用。大電流輸出往往暗示必須使用更大體積的電感，這可能造成使用規格上的困擾。 本論文提出一個具高轉換效率與高均流控制之交錯式升壓型轉換器，可以加速暫態響應速度並且在全載範圍維持高的轉換效率。除此之外，並且提出主僕式平均電流法，改良了傳統主動均流法（Active Current Sharing Method）要額外的接腳去接收個別相位的電流資訊，更不須使用傳統斜率控制法（Droop Method）使用額外的電阻來做為電流偵測的媒介，造成多餘功率的損耗，不僅簡單更精確的達到均流控制的目的。 本電路是以VIS 所提供之0.25μm 1P3M 製程參數來設計。當模擬輸入電壓為3.3V及輸出電流為300mA時，整體電路的轉換功率效率最高可以達到94.3％，因此非常適用於智慧型手機與平板電腦等可攜式電子產品。

With the rapid evolving IT technologies, today, lightweight, thin shape and high performance has become the essential specifications of smartphones, tablet PCs and other portable electronic products. However lightweight, thin and high-performance produced many products designed troubled. Than a conventional voltage or current controlled converter when the load current changes can have a shorter transient response time, can increase the switching frequency to achieve the purpose of the rapid reaction. However, increasing the switching frequency will produce greater power consumption, low conversion efficiency and reduce the battery life. In addition, the energy loss when the switch will generate heat, reduce the reliability of the power transistors use. The high-current output often implies the need to use a larger volume of the inductor, which may cause the troubles on the use of specifications. This paper presents a high efficiency and precise current balance skills in the interleaved boost converter can accelerate the boost converter's transient response speed and maintain a high conversion efficiency in the entire load range. In addition, this paper also proposed a method of Master and Average Current . This method Improved the traditional active current (Active Current Sharing Method) additional pins to receive individual phase current information, but also do not need to use additional resistors to detect the current medium using traditional slope control (Droop Method), causing excess loss of power, not only simpler and more precise control purposes. This circuit is implemented with VIS 0.25μm 1P3M CMOS technology. Simulation result show that the efficiency of the interleaved boost converter with CSC is 94.3％ when input voltage is 3.3V and output load current is 300mA. So, this proposed circuit is very suitable for smart phone and Tablet.