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dc.contributor.author黃國書en_US
dc.contributor.authorHuang, Guo-Shuen_US
dc.contributor.author李程輝en_US
dc.contributor.authorLee, Tsern-Hueien_US
dc.date.accessioned2014-12-12T01:54:32Z-
dc.date.available2014-12-12T01:54:32Z-
dc.date.issued2010en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079892504en_US
dc.identifier.urihttp://hdl.handle.net/11536/48953-
dc.description.abstract摘要       隨著網際網路的蓬勃發展,分散式系統的使用要求也日益增加,對於分散式系統而言,保持彼此間的時間同步是非常重要的議題,本論文引用高精度時間同步協定(Precision Time Protocol, PTP) IEEE 1588 主從式(Master-Slave)架構及時間戳(Time stamp)收發技術來做為系統之模型。 由於現行的網路採用封包交換網路系統,在資料傳輸過程中,有可能參雜大量的封包延時偏差,再加上原先主從式時鐘頻率及時間偏差,使得端點時間戳所記載之時間無法表示實際之封包傳輸時間,進而無法計算出主從式系統間的頻率及時間偏差。 本論文之目的,為發展出一套時間同步演算法,並且在高網路負載及大量封包延時偏差之情況下,仍能有效地估算出精準的頻率及時間偏差,使其能達到PTP系統預期之次微秒(<10-6秒)時間同步性能。zh_TW
dc.description.abstractABSTRACT As the rapid development of the Internet, the requirement of synchronization between distributed devices increases. This thesis addresses this issue with high-precision time synchronization protocol (Precision Time Protocol, PTP which is also called IEEE 1588), the hierarchical master-slave structure and time stamp transceiver technology as the system model. Since the current Internet uses the packet-switching technology, there could be a large packet delay variation (PDV) at the receiver. Moreover, the receiver clock is likely to have frequency skew and time offset with respect to the transmitter clock. In this thesis, we design and implement an effective clock synchronization algorithm. Under heavy traffic load and large packet delay variation situations, our proposed algorithm can provide good estimates of frequency skew and time offset. The precision achieved by our proposed algorithm is sub-microsecond (<10-6 sec).en_US
dc.language.isoen_USen_US
dc.subject時間同步zh_TW
dc.subject高精度時間同步協定zh_TW
dc.subject主從式架構zh_TW
dc.subject封包延時偏差zh_TW
dc.subject頻率偏差zh_TW
dc.subject時間偏差zh_TW
dc.subjectclock synchronization algorithmen_US
dc.subjectIEEE 1588, Precision Time Protocol (PTP)en_US
dc.subjectMaster-Slaveen_US
dc.subjectpacket delay variationen_US
dc.subjectfrequency skewen_US
dc.subjecttime offseten_US
dc.title應用於 IEEE 1588 之時鐘同步演算法及其實現zh_TW
dc.titleClock Synchronization Algorithm and Implementation based on the IEEE 1588 Architectureen_US
dc.typeThesisen_US
dc.contributor.department電機學院通訊與網路科技產業專班zh_TW
顯示於類別:畢業論文