標題: 雙異質接面假晶 磷化銦/砷化鎵銦/磷化銦P通道量子井場效電晶體對三五族互補電路的研究與應用
Study of Double Heterojunction Pseudomorphic InP/InGaAs/InP p-channel QWFET for III-V Complementary Circuit Applications
作者: 凃勝瀚
Tu, Sheng-Han
張翼
馬哲申
Chang, Edward Yi
Maa, Jer-Shen
照明與能源光電研究所
關鍵字: 磷化銦;砷化鎵銦;P通道量子井場效電晶體;三五族互補電路的應用;InP;InGaAs;p-channel QWFET;III-V Complementary Circuit Applications
公開日期: 2012
摘要: 由於P型三五族化合物半導體的電洞遷移率較低,使得三五族化合物半導體缺乏優秀之P型元件以滿足互補型電路的要求,為了提升P型三五族化合物半導體元件在高頻的表現,磊晶材料方面本論文探討藉由異質接面結構所引進的應變效應來提升電洞傳輸特性;而歐姆接觸方面採用兩種金屬系統做比較;最後元件方面探討閘極長度及源極與汲極間距之微縮技術來進一步增進元件特性。 在本實驗中,將微縮閘極長度(200nm □ 150nm)及源極與汲極間距(5μm □ 3μm)。實驗之磊晶試片具備208 cm2/Vs 之電洞遷移率,雙異質接面通道層 InP/In0.77Ga0.23As/InP 以及高濃度參雜(1x1019cm-3)的覆蓋層。由於p型半導體電洞遷移率比起n型半導體電子遷移率低,因此良好的歐姆接觸在元件效能上扮演重要關鍵。我們使用兩種金屬組合(Pt/Ti/Pt/Au 及 Ni/Au/Zn/Au)作為歐姆接觸金屬,其中Ni/Au/Zn/Au 達到 5.09x10-6 Ω/cm2 最低接觸阻值。本論文之電晶體製程技術包括:定義元件操作之主動區、歐姆接觸的形成以及金屬線閘極的定義。定義元件主動區時,採用分段蝕刻;閘極掘入技術採用多種溶液進行測試。 比較源極與汲極間距縮小前與未縮小的元件,間距縮小的元件在直流的特性上有顯著的提升,其汲極飽和電流密度從原先 10.84 mA/mm 提升到17.25  mA/mm,同時轉導值由16.1 mS/mm 提升到 25.07 mS/mm,與放大特性息息相關的電流增益截止頻率也由 3.2GHz 上升到 3.9GHz。 比較閘極長度微縮前與未微縮的元件,閘極微縮的元件在直流的特性上有更顯著的提升,其汲極飽和電流密度從原先 5.1 mA/mm 提升到17.25 mA/mm,同時轉導值由8.91 mS/mm 提升到 25.07 mS/mm,電流增益截止頻率也由 2.4 GHz 上升到 3.9GHz。
Due to the effect of the low hole mobility in p-type III-V compound semiconductor, the complementary circuit performance is severely restricted. In this thesis, in order to enhance the high-frequency performance for the p-type III-V compound semiconductor. We investigate the impact of strain in terms of improving hole mobility on the aspect of epitaxial structure. The strain was introduced by lattice mismatch in the heterojunction interface. Further, on the aspect of Ohmic contact, we compared two kinds of metal stacks in order to achieve lower contact resistance. Moreover, on the aspect of device, we scaled the gate length and source-drain spacing to enhance the device performance. We scaled the gate length from 200nm to 150nm and source-drain spacing 5μm to 3μm. Experimental epitaxial wafer has the hole mobility of 208 cm2/Vs, and contains the double heterostructure p-channel InP/In0.77Ga0.23As/InP and high p-type doping (1x1019cm-3) cap layer. The hole mobility of p-type III-V semiconductor is low compared to the electron mobility of n-type III-V semiconductor. As a result, a good Ohmic contact plays an important role on the device performance. We chose two metal systems (Pt/Ti/Pt/Au and Ni/Au/Zn/Au) for Ohmic contacts. The Ni/Au/Zn/Au reached 5.09x10-6 Ω/cm2, the best Ohmic contact resistance in this study. Device process included: the definition of the active region, the Ohmic contact formation and metal line gate lithography. Moreover, we used different solutions to etch active region and a variety of solutions for gate recess. With the source and drain spacing scaled (5μm → 3μm), the current density improved from the original 10.84 mA/mm to 17.25 mA/mm, the transconductance value from 16.1 mS / mm to 25.07 mS / mm and the cutoff frequency from 3.2GHz up to the 3.9 GHz. The gate length we also scaled from 200nm to 150nm and the DC performance was improved significantly from the 5.1 mA/mm to 17.25 mA/mm, the transconductance value from to 25.07 mS/mm to 8.91 mS/mm and the cutoff frequency from 2.4 GHz to the 3.9 GHz.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079905509
http://hdl.handle.net/11536/49016
顯示於類別:畢業論文