完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 何松庭 | en_US |
dc.contributor.author | 江蕙如 | en_US |
dc.date.accessioned | 2014-12-12T01:55:26Z | - |
dc.date.available | 2014-12-12T01:55:26Z | - |
dc.date.issued | 2012 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT079911654 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/49179 | - |
dc.description.abstract | 現今電路設計者在設計電路時,往往需要考量可能面臨到的動態變異。傳統上,電路設計會考慮最糟的情況,透過預留的timing guardband來確保電路能夠正確的運作在各種環境,但也因此降低的電路的效能。為了消除guardband,有人提出了resilient circuits。然而,resilient circuits將會面臨到更嚴峻的short path問題。 本篇論文為了使得resilient circuits的錯誤偵測與修正能夠發揮作用,因此著重於解決short path padding問題。不同於前人提出的貪婪啟發式演算法,我們會已global view來決定padding values與位置。此外,我們進一步提出coarse-grained與fine-grained padding allocation方法,根據所決定的padding values來加以實現。 | zh_TW |
dc.description.abstract | Modern IC designs are exposed to a wide range of dynamic variations. Traditionally, a conservative timing guardband is required to guarantee correct operations under the worst-case variation, thus leading to performance degradation. To remove the guardband, resilient circuits are proposed. However, the short path padding (hold time fixing) problem is severe in resilient circuits. In this thesis, to enable the timing error detection and correction mechanism of resilient circuits, we focus on the short path padding problem. Unlike recent prior work adopts greedy heuristics with a global view, we determine the padding values and locations with a global view. Moreover, we propose coarse-grained and fine-grained padding allocation methods to further achieve the derived padding values at physical implementation. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 短路徑填補 | zh_TW |
dc.subject | short path padding | en_US |
dc.title | 可復原時序錯誤之電路的短路徑填補演算法 | zh_TW |
dc.title | Short path padding for timing error resilient circuits | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |