以FPGA為核心結合基因演算法之類神經網路硬體實現

Abstract

本篇論文主要目標為實現基因演算法之硬體架構，並將其與類神經網路前饋計算之硬體架構做結合，用於找尋類神經網路中權重值的最佳解。有別於傳統的單點搜尋演算法，基因演算法採用多點(族群)的方式來找尋最佳解，由於不需要繁複的計算，而且可用二進位來做運算，更有利於在FPGA上之實現。本論文之基因演算法硬體架構使用交配突變單元(CMU)與搜尋單元(SU)兩個模組來加快搜尋速度。在交配突變單元中，同時產生交配遮罩(crossover mask)與突變遮罩(mutation mask)來加快硬體執行速度，此硬體共提供單點(one-point)、雙點(two-point)以及均勻(uniform)等三種交配方式，使用者可自行選擇，並依照需求來改變交配率(crossover rate)與突變率(mutation rate)。而搜尋單元則用來找尋上一世代中最好的個體，並將其存入新的族群當中，以避免在複製、交配與突變後產生較差的後代。此外類神經網路之前饋計算採單層多工(layer multiplexing)方式，藉由重複使用單一神經層來達到多層的運算，可有效減少硬體資源的使用。最後將整個硬體架構以Altera DE2-70 FPGA來實現，應用於二維最佳值搜尋、M-G曲線預測以及影像邊緣偵測，並獲得成功的實驗結果。

This thesis is aimed to implement the hardware structure of the genetic algorithm (GA), which is applied to search the optimal weights for the FPGA-based artificial neural network (ANN). In contrast with the traditional gradient algorithm, GA uses multi-point population to search the optimum, which is suitable to implement on FPGA in binary code without complex computation. There are two modules proposed for GA hardware to speed up searching, CMU and SU. The CMU generates one crossover mask and two mutation masks at the same time, not in order, to reduce a lot of execution clock cycles. The SU finds the best individual in each generation and saves it as the next generation parent to always keep the elite in the population. The hardware includes three crossover operations, one-point crossover, two-point crossover and uniform crossover. The users can choose one of them and define the crossover rate and mutation rate to deal with different problems. As for the forward calculation of ANN, the multilayer architecture is realized by the layer multiplexing method to reduce the resource since it only requires a single layer to be used repeatedly. The success of the GA hardware architecture is demonstrated by three experiments on Altera DE2-70 FPGA board with 50 MHz operation frequency, including two-dimensional optimal searching, M-G curve prediction fitting and edge detection.