標題: | 共享記憶體架構下平行測試向量產生器的 向量增長抑制技術 Suppressing Test Inflation in Shared-Memory Parallel Automatic Test Pattern Generation |
作者: | 顧鈞堯 溫宏斌 電信工程研究所 |
關鍵字: | 共享記憶體;平行測試向量產生器;動態錯誤分割;dynamic fault partition;parallel ATPG;shared-memory |
公開日期: | 2011 |
摘要: | 平行化硬體使平行運算可實作於測試向量產生器上,由於充足的平行運算硬體資源,使之前所提出的平行測試向量產生器,其運算速度可達到線性倍數的加速效果,但平行運算所衍生的向量增長也因此限制了平行化測試向量產生器的實用性。 篇論文即提出一個平行化測試向量產生器的系統,系統中運用同時中止、錯誤排序、漣漪壓縮之機制來抑制向量增長的問題。同時中止在向量產生與錯誤模擬針對同一個錯誤執行時,會停止向量產生的運作;錯誤排序則可減少測試向量產生的次數,並加快平行測試向量產生器的速度;而漣漪壓縮則能合併不同錯誤的測試向量。實驗結果指出:此論文所提出的平行測試向量產生器可減少11%的測試向量數,並抑制測試向量的增長至0%,同時運算速度達到6.5倍的加速效果。 Multicore machines enable the possibility of parallel computing in Automatic Test Pattern Generation (ATPG). With sufficient computing power, previously proposed parallel ATPG has reached near linear speedup. However, test inflation in parallel ATPG yet arises as a critical problem and limits its practicality. Therefore, we developed a parallel ATPG system that incorporates concurrent interruption, ripple compaction and fault ordering to deal with the test-inflation problem. Concurrent interruption aborts test generation on simultaneously detected faults by fault simulation. Ripple compaction combines tests for different faults while fault ordering strategically arranges the fault list to reduce the number of test generations and speeds up the ATPG process. As a result, the proposed parallel ATPG system effectively reduces 11% pattern count with 0% test inflation while maintaining an average of 6.5X speedup with no attenuation in fault coverage on experimental circuits. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079913635 http://hdl.handle.net/11536/49403 |
顯示於類別: | 畢業論文 |