完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 吳青峰 | en_US |
dc.contributor.author | Wu, Ching-Feng | en_US |
dc.contributor.author | 張翼 | en_US |
dc.contributor.author | Chang, Edward-Yi | en_US |
dc.date.accessioned | 2014-12-12T01:57:10Z | - |
dc.date.available | 2014-12-12T01:57:10Z | - |
dc.date.issued | 2012 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT079918545 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/49640 | - |
dc.description.abstract | 此研究主要探討如何應用感應耦合式電漿蝕刻系統(Iuductive Couple Plasma, ICP)製作GaAs/AlGaAs/InGaAs pHEMTs背面導通孔之蝕刻條件最佳化,還有探討接地前後之砷化鎵高電子遷移率電晶體的特性比較。 成功的背面導通孔結構必須具有平坦的底部及有小角度傾斜的平滑側壁,因此選用ICP作為背面蝕刻製程的方式,以AZ-4620光阻作為蝕刻遮罩,以氯氣和三氯化硼作為蝕刻氣體,並藉由比較ICP射頻功率(Coil power)、壓力、下電極射頻功率(Platen power)、氣體總流量及氣體流量比例,此五項參數對蝕刻結果的影響,以得到最佳化的蝕刻條件。 從實驗結果可知,當ICP射頻功率、壓力及氣體總流量提高時,蝕刻速率也隨之提升,而蝕刻試片的平滑度會隨著壓力的下降而明顯提升。當使用600W之 ICP射頻功率、10 mtorr之壓力及氯氣和三氯化硼比例為三比一時,可得到最佳化之導通孔蝕刻條件,且試片上之電鍍黃金層具有良好的連續性。隨後利用DC和RF量測來檢視其導通孔接地後之元件特性,在DC特性上可看出,其元件並無退化;而在RF特性上,藉由S參數之量測,可得出等效電路上的輸出端電感因背面導通孔結構從520 pH減少至380 pH,也因此使得電流增益截止頻率從32 GHz增加至38 GHz,功率增益截止頻率從53 GHz增加至57 GHz。由此可知,背面導通孔是個有效的GaAs HEMTs之接地方式,可降低電感,更進一步提升元件之高頻特性。 增加至57 GHz。由此可知,背面導通孔是個有效的GaAs HEMTs之接地方式,可降低電感,更進一步提升元件之高頻特性。 | zh_TW |
dc.description.abstract | This study focuses on ICP dry etching optimization for via hole structure of GaAs/AlGaAs/InGaAs pHEMTs and investigation of grounding GaAs HEMTs. The etching process of the via hole structure for GaAs substrate was optimized to obtain ideal via hole profiles with flat bottom, smooth and slanted sidewall by ICP dry etcher with AZ-4620 photoresist etching mask. The etching condition was optimized with different ICP parameters such as coil power, pressure, platen power, total flow rate and flow rate ratio of etching gases Cl2 and BCl3. In addition, the influences of different parameters were also investigated. Etch rate can be increased with higher coil power, pressure and total flow rate. The smoothness of etch profiles can be enhanced apparently by reducing chamber pressure. An optimized ICP dry etching condition for the backside process of GaAs substrate had been obtained with 600 W coil power, 10 mtorr pressure and a Cl2 and BCl3 flow rate ratio of 3:1. After ICP dry etching process, the gold layer was electroplated on the sample with good continuity to act as a grounding plane. Afterwards, the devices were characterized by DC and RF measurements. The DC performances show no degradation after backside process. From the S-parameters measurement, the output inductance reduces from 520 pH to 380 pH after backside process. The cut-off frequency is increased from 32 GHz to 38 GHz and the maximum oscillation frequency is increased from 53 GHz to 57 GHz. Therefore, via hole grounding is proved to be an effective approach to improve RF performances. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 背面製程 | zh_TW |
dc.subject | 砷化鎵高電子遷移率電晶體 | zh_TW |
dc.subject | 導通孔 | zh_TW |
dc.subject | Backside process | en_US |
dc.subject | Via Hole | en_US |
dc.subject | GaAs HEMT | en_US |
dc.subject | ICP etching | en_US |
dc.title | 利用感應耦合式電漿蝕刻系統製作砷化鎵之背面導通孔接地 | zh_TW |
dc.title | Backside Via Hole Process for Grounding GaAs HEMTs by Using ICP Dry Etching | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
顯示於類別: | 畢業論文 |