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dc.contributor.author徐永軒en_US
dc.contributor.authorHsu, Yung-Hsuanen_US
dc.contributor.author孟心飛en_US
dc.contributor.authorMeng, Hsin-Feien_US
dc.date.accessioned2014-12-12T01:58:01Z-
dc.date.available2014-12-12T01:58:01Z-
dc.date.issued2011en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079927522en_US
dc.identifier.urihttp://hdl.handle.net/11536/49938-
dc.description.abstract可撓式顯示技術與有機電子元件被視為新世代電子科技領域的重要的研究方向。擁有低成本與捲對捲量產製程優點的液態製程有機電晶體具備著發展這項電子科技的潛力,然而,現今卻缺乏能同時具有高輸出電流、高開關比與低操作偏壓等優良效能的液態製程有機電晶體。在本論文的研究中,我們將以目前發展最為完整、電性最優良的液態製程有機電晶體─空間電荷限制電晶體,發展出同時具備上述三項特性之液態製程有機電晶體。空間電荷限制電晶體的工作原理類似於真空三極管,以奈米網狀結構之基極控制垂直奈米孔洞通道的開關,進行電晶體的基本操作。此研究中,我們以自組裝單層分子處理空間電荷限制電晶體的垂直奈米孔洞通道,使附著於側壁上的自組裝單層分子協助通道中的有機半導體poly(3-hexylthiophene)排列成vertical方向,大幅提升輸出電流;此外,我們亦以本實驗室研發之刮刀塗佈技術取代傳統旋轉塗佈技術,應用於空間電荷限制電晶體中的有機半導體層poly(3-hexylthiophene)之成膜,進而將輸出電流再提升。最後,完成同時具備50-100 mA/cm2的高輸出電流密度、10000的高開關比與2 V的低操作電壓之高效能空間電荷限制電晶體。zh_TW
dc.description.abstractSolution-processed organic transistor with high output current, high on/off current ratio and also low operation voltage is required for the development of flexible displays and organic electronics based on low-cost roll-to-roll process. Successful demonstrations to fulfill all above requirements, however, are still lack. In this work, we present a promising vertical transistor to exhibit overall good performances. Numerous poly(3-hexylthiophene) vertical channels are embedded in vertical nanometer pores. Treating the sidewalls of pores by self-assembled monolayer with long alkyl chains helps to align poly(3-hexylthiophene) in vertical orientation and hence greatly enhances the channel current. Then, using blade coating instead of spin coating to deposit poly(3-hexylthiophene) further improves the channel current. A grid metal inside the porous template controls the channel potential profile to turn on and turn off the vertical transistor. Finally, the transistor delivers an output current density as 50-110 mA/cm2 at 2 V with an on/off current ratio larger than 10,000.en_US
dc.language.isozh_TWen_US
dc.subject空間電荷限制電晶體zh_TW
dc.subject刮刀塗佈技術zh_TW
dc.subject自組裝單層分子zh_TW
dc.subjectspace-charge-limited transistoren_US
dc.subjectblade coatingen_US
dc.subjectself-assembled monolayeren_US
dc.title自組裝單層分子與刮刀塗佈技術對有機空間電荷限制電晶體之影響zh_TW
dc.titleThe influence of self-assembled monolayer and blade-coating on the vertical polymer space-charge-limited transistoren_US
dc.typeThesisen_US
dc.contributor.department物理研究所zh_TW
Appears in Collections:Thesis