金離子嵌置二氧化矽結構之載子傳送與儲存效應

Abstract

To investigate the possibility of fabricating a multilayer gate IGFE T using an ion implanted floating electrode, an MOS structure has be en made using thermally grown SiO2 layers into which 70 or 100 keV A u+ ions were implanted. The effects of ion dose (10 12-10 14-2), oxi de thickness (500-1000A), and post implantation annealing treatment on the capacitance-voltage and currentvoltage characteristics were s tudied. A significant flatband voltage shift is observed for ion dos es larger than 10 13cm-2. Most of the interface states created by th e implantation damage anneal at 400C (Nss~10 10cm-2 for oxide thickn ess 750a). The carrier transport mechanism of the implanted SiO2 layer is conve rted from Fowler-Nordheim tunneling conduction to Frenkel-Poole bulk conduction with a trapping energy level 1.2 eV below the oxide condu ction band. From these mechanisms the flatband voltage shift due to electrons trapped at assumed localized Au charge storage centers is predicted. This reversible shift is experi-mentally confirmed by C-V measurements. The time required. for a lV flatband shift is about 10 -3 sec when a field of 10 7 V/cm is applied. Thus the resulting MOS structui behaves similarly to a f loating gate or multilayer device with obvious simplifications inm t he processing. It is believed that improvements in reducing the char ge time and the writing voltage may be realized by the use of thinne r oxides in conjunction with lower implantation energies.