完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Chih-Wei | en_US |
dc.contributor.author | Chiou, Jin-Chern | en_US |
dc.date.accessioned | 2014-12-08T15:07:01Z | - |
dc.date.available | 2014-12-08T15:07:01Z | - |
dc.date.issued | 2010-05-01 | en_US |
dc.identifier.issn | 1424-8220 | en_US |
dc.identifier.uri | http://dx.doi.org/10.3390/s100504238 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/5483 | - |
dc.description.abstract | This study reports a new stacking method for assembling a 3-D microprobe array. To date, 3-D array structures have usually been assembled with vertical spacers, snap fasteners and a supporting platform. Such methods have achieved 3-D structures but suffer from complex assembly steps, vertical interconnection for 3-D signal transmission, low structure strength and large implantable opening. By applying the proposed stacking method, the previous techniques could be replaced by 2-D wire bonding. In this way, supporting platforms with slots and vertical spacers were no longer needed. Furthermore, ASIC chips can be substituted for the spacers in the stacked arrays to achieve system integration, design flexibility and volume usage efficiency. To avoid overflow of the adhesive fluid during assembly, an anti-overflow design which made use of capillary action force was applied in the stacking method as well. Moreover, presented stacking procedure consumes only 35 minutes in average for a 4 x 4 3-D microprobe array without requiring other specially made assembly tools. To summarize, the advantages of the proposed stacking method for 3-D array assembly include simplified assembly process, high structure strength, smaller opening area and integration ability with active circuits. This stacking assembly technique allows an alternative method to create 3-D structures from planar components. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | microassembly | en_US |
dc.subject | microprobe array | en_US |
dc.subject | three dimensional probe array | en_US |
dc.title | Development of a Three Dimensional Neural Sensing Device by a Stacking Method | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.3390/s100504238 | en_US |
dc.identifier.journal | SENSORS | en_US |
dc.citation.volume | 10 | en_US |
dc.citation.issue | 5 | en_US |
dc.citation.spage | 4238 | en_US |
dc.citation.epage | 4252 | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000278105100004 | - |
dc.citation.woscount | 5 | - |
顯示於類別: | 期刊論文 |