視訊處理機中可再組計算路徑之研究

Abstract

在視訊處理機中，有效率的資料計算路徑是相當重要的。在本篇論文中， 我們提出一個高效率可再組的資料計算路徑。為了達到高效率，我們使用 了進位儲存加法器，加位數字系統以及二階管線化的技術。另外，為了設 計有效率的資料路徑控制器，我們設計了三種控制方法：虛擬資料隨位控 制，資料隨位控制，分散式固定時間控制。同時，為了有效的避免資源衝 突，利用移位計數器，我們也設計了簡單但有效率的電路來偵測此類錯誤 。利用Ｍａｇｉｃ電路佈局工具，我們實現了整個電路，包括資料計算路 徑，對應的控制信號解碼器，以及資源衝突偵測器，根據ＩＲＳＩＭ的模 擬，速度可達７５ＭＨｚ。 An efficient data path in video signal processor is great important. In the thesis, we propose a high performance reconfigurable datapath for video siganl processing. To pursue high performance, this design adopts some useful techniques, such as using carrry save adders, encoding some results by the redundant binary number system, and constructing the processing units with the two-level pipeline technique. In addition, to design the efficient control unit for the datapath, we investigate three kinds of intrapipeline control schemes. They are the pseudo data-stationary control, the data-stationary control, and the distributed time-stationary control. Moreover to effectively avoid the resource conflicts, we design an efficient and simple circuit, which is based on the shift counters to detect the hazards. Using MAGIC, we have implemented the whole circuits, including the data path, the decoding part in the associated control unit, and the resource conflict detecter. According to the IRSIM simulation results, the speed of the data path reaches 75 MHz.