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dc.contributor.author何濂洵en_US
dc.contributor.authorHo, Lien-Hsunen_US
dc.contributor.author鄒應嶼en_US
dc.contributor.authorTzou, Ying-Yuen_US
dc.date.accessioned2014-12-12T02:11:18Z-
dc.date.available2014-12-12T02:11:18Z-
dc.date.issued1992en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT813327001en_US
dc.identifier.urihttp://hdl.handle.net/11536/57399-
dc.description.abstract本論文設計並製作一以數位信號處理器為基礎之全數位式不斷電電源供應系統。文中建立異於傳統脈寬調變換流器之精確數學模型,此一模型能完全反應系統的動態特性,使控制之精度得以大幅提昇。此外,根據脈寬調變換流器的數學模型,本論文自行發展一套簡便而有效的控制器設計法則。此一法則依據所期望之閉迴路步階響應,利用最小平方法計算出相對應之極點位置,使系統響應能在預先規劃好的閉迴路架構下,達到最符合設計者要求的特性。另外,本文規劃全數位式不斷電電源供應系統中的各種控制信號,並以此獨力設計製作一以數位信號處理器為基礎之泛用型控制單板。最後,在此硬體架構下,完成不斷電電源供應系統中脈寬調變換流器之控制。本文針對四種不同的步階響應分別求出對應之閉迴路極點位置,並分析其結果。在實驗中,空載的總諧波失真(Total Harmonic Distortion, THD)為1.12%;滿載的總諧波失真為2.23%;而整流性負載(crest factor=3.0)的總諧波失真為4.46%。模擬與實驗結果顯示,利用本語文所提出的控制器設計方法,能以3.96KHz的低取樣頻率,達到市售UPS對總諧波失真的規格要求。zh_TW
dc.description.abstractThe design and implementation of a DSP - based fully digital - controlled UPS is studied in this thesis. An accurate mathematical model of the PWM inverter ussed in an UPS is constructed, and it behaves nearly the same as the real circuit. With this model, the accuracy of control can be greatly increased. In addition, a simple and effecitve control algorithm is also proposed according to the derived model of the PWM inverter. The algorithm figures out the poles of the system such that the output respouse can match the desired response in the least square sense. Thus, the response of the system can fulfill the designer's requirements under the predefined closed - loop scheme by utilizing this strategy. The analysis and calculation of the poles of the system with repect to four different desired responses are presented in this thesis, too. Furthermore, a DSP - based control board is also implemented to control the concerned UPS system. The experimental results show that the output has a total harmonic distortion (THD) of 1.12% for no load condition and 2.23% for full load condition, while that for the rectifler load (crest factor = 3) is only about 4.46%. The results not only verify the validity of the derived model but also show that the output response of the system controlled by the proposed algorithm can fulfill te specifications set for the UPS on sale.en_US
dc.language.isozh_TWen_US
dc.subject數位信號處理器為基礎zh_TW
dc.subject全數位式UPSzh_TW
dc.subject控制zh_TW
dc.subjectDSP-Baseden_US
dc.subjectFully digital controlled UPSen_US
dc.subjectControlen_US
dc.title以數位信號處理器為基礎之全數位式UPS之研製zh_TW
dc.titleDesign and Implementation of a DSP-Based Fully Digital Controlled UPSen_US
dc.typeThesisen_US
dc.contributor.department電控工程研究所zh_TW
Appears in Collections:Thesis