Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 陳弘堯 | en_US |
dc.contributor.author | Hung-Yao Chen | en_US |
dc.contributor.author | 陳正 | en_US |
dc.contributor.author | Cheng Chen | en_US |
dc.date.accessioned | 2014-12-12T02:11:53Z | - |
dc.date.available | 2014-12-12T02:11:53Z | - |
dc.date.issued | 1993 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT820392028 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/57832 | - |
dc.description.abstract | 中提出一種可適用於迴圈內有不同執行路徑存在時,而可以正確完成軟體 導管化的方法,稱為時間狀態區塊排序法 TSB (Time Sta- te Block)。 其最大特色是能跨越基本區塊 (Basic Block) 的限制,而將數個基本區 塊合併在一起,以提升指令間的平行度。此外我們還加入分支預測 (Branch Prediction) 以進一步改善編譯器的功能,縮短程式執行時間。 本文中將對這些方法、原理做詳細的說明。目前這些方法已建立在我們所 發展的 PCE (Parallel Compilation Environment) 中,同時也在 IBM RS/6000 工作站上完成初步之測試工作。經由若干標竿程式 (Benchm- ark Programs) 之初步測試與評估,均有良好的效果。這對超 純量多處機系統編譯器的設計提供相當重要的參考。 In this thesis, we have proposed a Software Pipelining method called TSB (Time State Block) which it can use in the loop with multi-path. It can across the limit of basic block and combine w- ith several basic block to a bigger block. Besides, we add branch prediction to promote the ability of compiler. We have implemented these method in our PCE (Parallel Compil- ation Environment) and running on IBM RS/6000 workstation. We ha- ve also evaluated our method by using several benchmark programs. The results show that some reasonable execution speedup can be o- btained. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 超純量;軟體導管化;編譯器;排序法 | zh_TW |
dc.subject | Superscalar;Software Pipelining;Compiler;Scheduling | en_US |
dc.title | 為超純量系統編譯器中有多重路徑下軟體導管化之研究 | zh_TW |
dc.title | A Study on Software Pipelining with Multi-Path for Superscalar Compiler Design | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
Appears in Collections: | Thesis |