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dc.contributor.author黃崇光en_US
dc.contributor.authorChung-Kuang Huangen_US
dc.contributor.author吳慶源en_US
dc.contributor.authorChing-Yuan Wuen_US
dc.date.accessioned2014-12-12T02:12:07Z-
dc.date.available2014-12-12T02:12:07Z-
dc.date.issued1993en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT820430011en_US
dc.identifier.urihttp://hdl.handle.net/11536/58007-
dc.description.abstract極性電晶體及另一加強型金氧半場效電晶體積體在一起所構成 體的特性 ,其中包括實驗及理論分析。我們利用藍達雙極性電晶體 峇艇顗垓z分析 來探討其工作原理,其中元件的重要特性如負電阻. H已知的元件參數來 表示。此一三個端點的負電阻電晶體被用來組成幾個新式的靜態隨機存取 的記憶細胞元。 迣璊萱珩捰角尾R態隨機存取記憶體的工作效率,包 括單邊讀寫操作及其周邊電路,均加以研究及分析。我們經由S-SPICER , t及低功率靜態隨機存取記憶體可以由所提的新細胞元獲得。 The voltage-controlled negative-differential-resistance device using the merged integrated circuit of an n-p-n bipolar transistor and an n-channel enhancement MOSFET, which had been called the Lambda bipolar transistor(LBT), is studied both experimentally and theoretically. The principal operation of the Lambda bipolar transistor is characterized by a simple circuit model and device physics. The important device properties such as the negative differential resistance, and the valley voltage are derived in terms of the known device parameters. This three terminal ^-type LBT is then used to construct several new memory cells for SRAM applications. The high-performance SRAM's based on the proposed new memory cells using the one-sided read/write operations are examined and the peripheral circuits of SRAM's are discussed. With the help of a network anslysis program S-SPICE, it is verified that high- density, high-speed and low-power SRAM's can be obtained by the proposed new SRAM cells.zh_TW
dc.language.isoen_USen_US
dc.subject藍達雙極性電晶體;靜態隨機存取記憶單元.zh_TW
dc.subjectLambda Bipolar Transistor(LBT); Static Random Access Memory (SRAM) Cell.en_US
dc.title藍達雙極性電晶體的分析及其在靜態隨機存取記憶單元設計的應用zh_TW
dc.titleAnalysis of the Lambda Bipolar Transistor(LBT) and its designs for New SRAM Cellsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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