利用複晶矽或矽化鈦含非晶矽緩衝層當擴散源形成矽化鈦淺接面之研究

Abstract

在本論文中,利用複晶矽或矽化鈦含非晶矽緩衝層當擴散源來製成矽化鈦 淺接面二極體.(1)用複晶矽當擴散源(PADS)的矽化鈦接面:因為對植入的 雜質而言,複晶矽是很好的擴散源, 所以我們可以輕易的得到均勻且陡峭 的接面,然後接下來矽化鈦在複晶矽表面的形成可降低複晶矽的片電阻到 ３歐姆/sqr.然而,接面的特性和深度是根據矽化的溫度.這結果顯示最好 的p+n接面是製造在使用20分鐘700C的矽化.在這條件下,接面表現出低 於0.5nA/cm^2的漏電而且約0.18微米的接面深度.同樣的對n+p接面,經過 900C,20分鐘的矽化可以得到最好的特性, 它有低於1nA/cm^2的漏電流和 大約0.14微米的接面深度.(2)矽化鈦含非晶矽緩衝層當擴散源的接面:這 種接面是利用離子佈植穿過矽化鈦(ITS)的方法形成的.然而,矽化鈦薄膜 不是由鈦與下面的單晶矽反應來的, 而是由鈦與另外層積的非晶矽.使用 這個技術, 我們可以得到均勻的矽化物與矽的介面,而且這二極體表現出 比傳統的(ITS)更好的特性.從SIMS剖面的測量,p+n和n+p的接面深度約為 0.1微米,這比PADS矽化鈦接面更淺.然而接面的特性是以不同的退火溫度 來研究. 結果顯示最好的n+p和p+n二極體是分別製造在850C和950C,退火 時間都是15分鐘.另外p+n有低於1nA/cm^2和n+p趨近於1.3 nA/cm^2的5伏 特漏電流.因此,根據以上的結果,用這兩個不同方法形成的高表現性二極 體是適和於次微米的應用. Titanium-silicided shallow junction diodes were fabricated using polysilicon or TiSi2 with an amorphous buffer layer as a diffusion source.(1)For the polysilicon-as-diffusion-source( PADS) Ti-silicided junctions: Since the polysilicon acts as an diffusion source for implanted dopants, we are easy to achieve the uniform and steep junction. Then, the subsequent Ti- silicide formation on the surface of polysilicon was able to reduce the sheet resistance of polysilicon films to about 3 ohm/ sqr. the junction characteristics and depth were dependent on temperature. The results showed that the best p+n junctions made 20 min silicidation at 700C. With the conditions, the junctions exhibited a leakage current lower than 0.5 nA/cm^2 and the depth about 0.18 um. Similarly, for n+p junctions, silicidation at 900C for 20 min obtained the best characteristics which had a leakage lower than 1 nA/cm^2 and junction depth around 0.14 um. (2) For "TiSi2 with an a-Si buffer layer" junctions:The junctions were formed by using implantation through silicide(ITS) method. However, the TiSi2 was not from the reaction of Ti with silicon, but from the reaction of Ti with an additional deposited a-Si. Using this technology, the uniform silicide/silicon interface, as shown in cross-sectional TEM, can be obtained and the diodes exhibited more excellent performance than ITS diodes. From the SIMS profiles measurement, the junction depth of both p+n and n+p was around 0.1 um. The depth is more shallow than PADS Ti- silicided diodes. The junction integrity was studied as a function of annealing temperature. The results showed that the best diodes were made using 15 min annealing at 850C and 950C for p+n and n+p, respectively. Andthese diodes had a leakagecurrent lower than 1 nA/cm^2 for p+n and as low as 1.3nA/ cm^2 for n+p at the bias of 5 V.