Title: 多處理機之可容錯單邊縱橫交換鍵可靠度分析及 FPGA 實現
Reliability Analysis and FPGA Realization of Fault-Tolerant One- Sided Crossbar Switches for Multiprocessor Systems
Authors: 張鳳真
Chang Feng-Chen
王國禎
Kuochen Wang
資訊科學與工程研究所
Keywords: 單邊縱橫交換鍵;成本效益;現場可程式邏輯陣列閘;One-sided crossbar switch;cost-effectiveness;FPGAs
Issue Date: 1994
Abstract: 在本論文中,我們對共用記憶體多處理機系統之三種縱橫交換鍵:「單邊
縱橫交換鍵」,「改良型單邊縱橫交換鍵」與「漣漪型單邊縱橫交換鍵」
三種可容錯單邊縱橫交換鍵分別做了可靠度分析,並且以現場可程式邏輯
陣列閘相關工具及元件實現此三種可容錯單邊縱橫交換鍵。傳統的「雙邊
縱橫交換鍵」在每一對處理機與記憶體模組間只有一條路徑可相連,導致
它不具備有容錯能力。單邊縱橫交換鍵的架構在每一對處理機與記憶體模
組間有多條路徑,所以具備有容錯能力,但是單邊縱橫交換鍵的成本是雙
邊縱橫交換鍵成本的兩倍。這個缺點使得單邊縱橫交換鍵無法廣泛的應用
在多處理機系統中。此二種新的交換鍵模型能夠兼顧容錯能力與成本兩者
,但是它們的可靠度應該進一步驗證。實驗結果顯示,此兩種交換鍵在錯
誤率為 0.01 時,它們的可靠度為 1 能夠維持十個小時。這些優點可以
促進縱橫交換鍵在考量性能及可靠度下 大量應用於多處理機系統。此外
我們也利用 Synopsys FPGA Compiler 及 Xilinx FPGA tools 此實現此
三種可容錯單邊縱橫交換鍵本論文最主要的貢獻在於透過可靠度分析與成
本及FPGA雛型實現來驗證改良型單邊縱橫交換鍵及漣漪型單邊縱橫交換鍵
符合成本效益,從而可推廣應用於多處理機系統。
In this thesis, we analyse the reliability of three crossbar
switches for shared memory multiprocessor systems: the one-
sided crossbar switch}, the modified one-sided crossbar switch,
and the ripple K one-sided crossbar switch. We also use FPGA
tools to implement these three fault-tolerant one-sided
crossbar switches. In a traditional two-sided crossbar switch,
there is a unique-path between a processor and a memory module.
It results in no fault-tolerance in the two-sided crossbar
switch. The one-sided crossbar switch enhances the fault
tolerance ability by providing multiple paths between a
processor and a memory module. However, the cost of the one-
sided crossbar switch is almost twice than that of the
traditional two-sided crossbar switch. The drawback prevents
the one-sided crossbar switch from applying in multiprocessor
systems widespreadly. The two new switches can provide a trade-
off between fault tolerance ability and cost. However, their
reliabilities should be further verified. Results indicate
reliability (R(t)) of either of these two switches remains 1
for first ten hours of operation as failure rate = 0.01. This
prompts them to be applied to multiprocessors systems to
enhance performance and reliability as well. In addition, we
use the Synopsys FPGA (Field Programmable Gate Array) Compiler
and the Xilinx tools to realize the three fault-tolerant one-
sided crossbar switches using FPGAs. The main contribution of
this thesis is promoting to adopt the two novel fault-tolerant
one-sided crossbar switches in multiprocessor systems by
further demonstrating their cost-effectiveness via reliability/
cost analysis and FPGA prototyping.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT830394066
http://hdl.handle.net/11536/59091
Appears in Collections:Thesis