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dc.contributor.author劉逸民en_US
dc.contributor.authorI-Min Liuen_US
dc.contributor.author吳慶源en_US
dc.contributor.authorChing-Yuan Wuen_US
dc.date.accessioned2014-12-12T02:13:43Z-
dc.date.available2014-12-12T02:13:43Z-
dc.date.issued1994en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT830430044en_US
dc.identifier.urihttp://hdl.handle.net/11536/59231-
dc.description.abstract藍達雙極性電晶體是利用加強型金氧半場效電晶體與其寄生的雙極性電晶 體所合成的一種電壓控制負微分電阻電晶體,可應用於記憶的元件。本文 提出新的藍達雙極性電晶體結構,並以簡單的電路模式與元件物理來探討 其工作原理。利用所提的藍達電晶體,本文設計完成新型單邊讀寫靜態記 憶細胞元,並與現有之細胞元比較。本文亦分析一個適合讀取單位元線靜 態記憶體的電流放大器,並加以應用。最後,利用模擬的方法,證實我們 的方法與架構可以獲得一個高效能的靜態機隨機記憶體。 The voltage-controlled negative-differential-resistance device by using merged integrated circuit of n-channel enhancement mode MOSFET's and parasitic NPN bipolar transistors, called Lambda bipolar transistor (LBT), is known for its memory application. In this thesis, new LBT structures are developed, and their characteristics are derived by simple circuit model and device physics. Novel single-sided static memory cells based on the proposed LBT's are presented. Comparisons between the proposed and conventional cells are also made. A new current sense amplifier suitable for the read operation of single-bit- line SRAM's is analyzed and applied to our circuit. Finally, timing simulations based on our organization are presented, which demonstrate a high-performance SRAM can be achieved by the proposed methodology.zh_TW
dc.language.isoen_USen_US
dc.subject藍達電晶體; 靜態隨機記憶體zh_TW
dc.subjectLambda Bipolar Transistor; SRAMen_US
dc.title利用藍達雙極性電晶體組成之靜態隨機記憶細胞元的分析及設計zh_TW
dc.titleAnalysis and Design of New SRAM Memory Cells Based on Lambda Bipolar Transistoren_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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