具次半微米填隙之電子迴旋共振氧化物金屬間介電層的可靠度分析

Abstract

以電子迴旋共振(ECR)產生電漿而沉積的氧化物做為金屬間介電層 (IMD) 的應用,在次半微米應用技術上已完成特性分析.ECR化學氣相沉積的製程 可以得到沒有空洞的填隙結果.而且結合ECR化學氣相沉積的製程和 SOG的 回蝕刻或化學機械的研磨(CMP)技術可以得到好的平坦度. ECR化學氣相沉 積的製程用在次半微米技術的主要關鍵點是它對元件的電漿損傷.在論文 裡,熱載子施壓和Fowler-Nordheim穿遂施壓用來偵測元件的損傷.實驗設 計被用來探討不同的製程參數對元件傷害所造成的影響.在我們的研究中, 輸入的微波功率顯示具最大的影響力.當微波功率降到1400瓦時,元件的可 靠度跟傳統的IMD製程(SOG的夾層結構)是可相比擬的.若使用低一點的蝕 刻對沉積比(E/D ratio),也可以減輕元件的鈍化.另外,對RF功率和其它製 程參數所造成的影響也被詳細討論. Electron cyclotron resonance plasma oxide (ECR oxide) for the inter-metal dielectric (IMD) application has been well characterized for sub-half-micron technology. The void-free gap- filling capability of the ECR CVD process is demonstrated. Good planarity was obtained by combining ECR CVD process with either SOG etchback or chemical mechanical polishing (CMP) technique. The major concern for the implementation of ECR CVD process into sub-half-micron technology is device damage. In this thesis, hot-carrier stress and Fowler-Nordheim (F-N) tunneling stress were performed to detect device damage. Experiments were designed to evaluate the influence of various process parameters on device damage. In our study, the microwave power input shows the most significant effect. As the microwave power reduced down to 1400 watts, the reliability performance of devices with ECR oxide is comparable to that of devices with the conventional IMD process (SOG sandwich structure). The ECR CVD process with lower etch-to-deposition ratio (E/D ratio) is also helpful in alleviating the device degradation. In addation, the impact from RF power and other process parameters were extensively investigated as well.