金摻雜高速切換PN接面二極體元件

Abstract

本論文研究金摻雜二極體元件的高速切換特性,其要旨在於得到較高的雜 質濃度和較短的二極體切換時間.我們以深層能階分析儀(DLTS)來研究金 在矽中的能階及分佈情形外,另外也分別以SIMS和展阻量測來研究金於矽 中的分佈情形及載體分佈情形. DLTS觀察到兩個能階,受體能階位於傳導 帶之下0.56eV處而施體能階位於價帶之上0.35eV處.雜質濃度對於擴散溫 度和時間的相依性是金濃度隨擴散溫度和時間的增加而增加.另一方面,切 換時間隨擴散溫度和時間的增加而變短.因此較高的擴散溫度和較長的擴 散時間能得到較高的雜質濃度和較短的切換時間.從樣品的橫截剖面分佈 看來,離子對或金磷複合物所形成的金累積現象出現於距表面約1微米深的 區域內,其它部分的金分佈則是相當均勻的. The task of this thesis is to obtain a higher trap concentration to reduce the switching time in diodes. Deep level Transient spectroscopy (DLTS) is employed to study the electric active deep levels and the trap concentration. In additional, Secondary Ion Mass Spectroscopy (SIMS) and spread resistance measurement are also performed to study the distribution of diffused Au element in Si and the variation of conductivity in Si, respectively. Two energy levels are observed. An acceptor and a donor level are located at Ec-0.56 eV and Ev+0.35eV,respectively. It is found that the concentration of deep levels due to Au diffusion increases with increasing temperature and duration. Furthermore, the switching time decreases with increasing temperature and duration. Based on these results, diodes with shorter time (10nsec) can be obtained by a long duration Au diffusion at higher temperatures. The gold distribution is uniform except the region near the Si surface. The distribution profile of Au shows an accumulation region near the Si surface. This Au accumulation is ion-pairing or gold-phosphorus complexes related.