完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 張東原 | en_US |
dc.contributor.author | Dong-Yan Chang | en_US |
dc.contributor.author | 陳明哲 | en_US |
dc.contributor.author | Ming-Jer Chen | en_US |
dc.date.accessioned | 2014-12-12T02:13:52Z | - |
dc.date.available | 2014-12-12T02:13:52Z | - |
dc.date.issued | 1994 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT830430129 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/59325 | - |
dc.description.abstract | 次臨界(Subthreshold) CMOS 積體電路為當今國際重點研究課題之一,理 由為晶片上元件數目越來越多,於是面臨了功率消耗問題,將所有元件操 作在次臨界區是降低功率的可行方法之一,另外在此區電流為閘極及基座 偏壓之指數函數關係,使得類比計算為可能。唯次臨界區特性對製程變動 極為敏感,因為電流與臨界電壓(Threshold Voltage)是為指數關係,因 此以統計的方法經由實驗進行匹配誤差(Mismatch)分析,並據以描述元件 特性是無可避免的。透過此方式,我們可以知道元件特性參數對製程變化 的敏感性並能以定量表達之,將此知識應用於電路設計上,可減少電路設 計錯誤,降低嘗試錯誤成本。 Subthreshold CMOS integrated circuit is one of the most improtant research themes around the world. One of the reasons is that the number of the devices on a chip is dramatically increased to the level causing the power consumption problem. One of the ways to reduce the power consumption is by making all MOS devices each operating in the subthreshold region. Additionally, in this region the MOS drain current is exponentially proportional to the gate and bulk voltages, thus making analog computation possible. However, the subthreshold I- V characteristics can be extensively sensitive to process variations, because the drain current is about exponentially proportional to the threshold voltage. We have extensively measured and statistically analyzed the current mismatch of the device characteristics. From the analysis, we can express statistically the device parameters as function of process variations, which can further be utilized for the circuit design such as to reduce the design error and cost. | zh_TW |
dc.language.iso | en_US | en_US |
dc.subject | 次臨界;背閘順偏;匹配;匹配誤差;類比計算電路 | zh_TW |
dc.subject | Subthreshold;Back-Gate Forward Biasing;Matching;Mismatching; Analog CMOS Computation | en_US |
dc.title | 電晶體匹配改進技巧及次臨界類比互補式金氧半計算電路 | zh_TW |
dc.title | Transistor Matching Improvement Technique and Subthreshold Analog CMOS Computation Circuits | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |