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dc.contributor.author呂鑫邦en_US
dc.contributor.authorHsing-Pang Luen_US
dc.contributor.author陳明哲en_US
dc.contributor.authorMing-Jer Chenen_US
dc.date.accessioned2014-12-12T02:13:52Z-
dc.date.available2014-12-12T02:13:52Z-
dc.date.issued1994en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT830430133en_US
dc.identifier.urihttp://hdl.handle.net/11536/59329-
dc.description.abstract本論文主要在討論並利用金氧半電晶體在背閘順偏下所展現的特性.背閘 順偏技巧能降低臨界電壓,因此增加了電流推動能力.我們利用簡單的反向 器電路成功的導出模式描述反向器在負載電容下所展現次臨界區域的交流 響應及直流特性.我們可以從模式中了解到電路的上升時間和下降時間與 各種參數之間的關係,如負載電容,工作電壓,次臨界電流等,並可從中獲得 我們若要使電路操作在次臨界區域下各種特性的參考.論文中同時也提出 一種能降低次臨界電流的源極阻抗開關電路,這種開關能大幅降低電路消 在準備狀態下的功率消耗,使的電路能夠在低電壓,低功率消耗下工作,尤 其在數位電路上更顯得重要.我們並針對源極阻抗開關所使用不同的通道 寬度來探討次臨界電流與傳輸延遲時間的折衷關係. The major study of this thesis is to investigate and employ the characteristics of a MOS transistor with back gate slightly forward biased. The action of back-gate forward bias can reduce the threshold voltage and thus increase the current drive ability. We introduce a new model concerning the transient switching response and DC characteristics of a CMOS inverter operating in subthreshold region, derived based on a new subthreshold current model. From this model, we can transparently obtain the dependences of the rising and falling times on circuit parameters such as load capacitance, supply voltage, and subthreshold current. Design guildlines can also be drawn for ensuring the circuits operated only in subthreshold.The thesis further intrduces a technique of inserting a switched impedance in order to reduce subthreshold current. As a conquence, the stand-by power consumption of system can be greatly reduced, which is especially important for the digital circuits.We design various circuits with different channel widths in the source impedance switch to find the trade-off between subthreshold current and propagation delay time.zh_TW
dc.language.isoen_USen_US
dc.subject次臨界;背閘順偏;源極阻抗zh_TW
dc.subjectSubthreshold;Back-Gate Forward Biasing;Switched-Source-Impedanceen_US
dc.title實現高性能互補式金氧半數位電路之背閘順偏及源極阻抗開關技巧zh_TW
dc.titleThe Back-Gate Forward Biasing and Switched Source Impedance Techniques for High Performance CMOS Digital Circuitsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
顯示於類別:畢業論文