標題: 複晶矽薄膜電晶體之研究
Study of polycrystalline silicon thin film transistors
作者: 連文宏
Wen-Hung Lien
鄭晃忠
Huang-Chung Cheng
應用化學系碩博士班
關鍵字: 固態再結晶,低溫爐管退火,高溫快速退火,複晶矽薄膜;Solid phase crystalline,RTA,Poly-Si TFTs,silane,disilane
公開日期: 1994
摘要: 本文中針對使用Si2H6為反應氣體,經由低壓化學氣相層積系統成長的非 晶矽薄膜,以不同的退火條件做固態再結晶反應形成複晶矽薄膜。使用 Si2H6層積而成的再結晶薄膜其晶粒尺寸大於傳統以SiH4層積而成的再結 晶薄膜。當層積溫度在475℃可得到最大的晶粒。在此溫度下因為矽原子 晶格排列呈現最大結構亂度,使成核速率達到最小。結構亂度的增加不只 因為降低基材溫度也因為增加層積速率而變大。層積溫度、層積壓力、氣 體流速及晶片間距均會影響層積速率。此外,也因為有較大的晶粒而可得 到較好的電性。一種新方法結合低溫爐管退火及高溫快速退火可得到高品 質的複晶矽薄膜,並可因此減少非晶矽薄膜經固態再結晶所需冗長的退火 時間。在200℃的層積溫度下,使用光反應化學氣相層積系統所層積的低 溫氧化層,可與再結晶複晶矽薄膜結合製成低溫的複晶矽薄膜電晶體。即 使電晶體製成過程中最高溫度只有600℃,依然可得到很好的電性。 The solid pases recrystallization of amorphous silicon ( α-Si ) films deposited by a low-pressure chemical vapor deposition system using disilane (Si2H6) gas at various annealing conditions are investigated. The grain sizes of recrystallized films formed from Si2H6 are larger than that formed from SiH4. The maximum grain size is obtained at the deposition temperature of 475℃, where the nucleation rate is minimum due to the maximum structural disorder of the Si network. The structural disorder increases not only by lowering the substrate temperature but also by increasing the deposition rate. A significant improvements concerning electrical characteristics are achieved due to the great grain size. A new method which combinates low-temperature furnace annealing and high-temperature rapid thermal annealing leads to obtained high- quality poly-Si films and to reduce the long annealing time for solid phase crystallization(SPC) of amorphous silicon films. The low temperature oxide films deposited at 200℃ by photochemical- assisted vapor deposition process can be used to combinate the recrystallized poly-Si films to achieve the low temperature fabrication of Poly-Si TFTs.We also obtaine excellent electrical characteristics, even though the maximum temperature during the TFT fabrication process is only 600 ℃.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT830500020
http://hdl.handle.net/11536/59596
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