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dc.contributor.authorHsiao, Chen-Fongen_US
dc.contributor.authorChen, Yuanen_US
dc.contributor.authorLee, Chen-Yien_US
dc.date.accessioned2014-12-08T15:07:38Z-
dc.date.available2014-12-08T15:07:38Z-
dc.date.issued2010-01-01en_US
dc.identifier.issn1549-7747en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSII.2009.2037262en_US
dc.identifier.urihttp://hdl.handle.net/11536/6006-
dc.description.abstractIn this brief, a generalized mixed-radix (GMR) algorithm is proposed for memory-based fast Fourier transform (FFT) processors to support prime-sized and traditional 2(n)-point FFTs simultaneously. It transforms the index to a multidimensional vector for efficient computation. By controlling the index vector to satisfy the "vector reverse" behavior, the GMR algorithm can support not only in-place policy for both computation and I/O data for continuous data flow to minimize the memory size but also multibank memory structures to increase the maximum throughput without memory conflict. Finally, a low-complexity implementation of an index vector generator is also proposed for our algorithm.en_US
dc.language.isoen_USen_US
dc.subjectContinuous data flowen_US
dc.subjectfast Fourier transform (FFT)en_US
dc.subjectgeneralized mixed radix (GMR)en_US
dc.subjectin-placeen_US
dc.subjectvector reverseen_US
dc.titleA Generalized Mixed-Radix Algorithm for Memory-Based FFT Processorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSII.2009.2037262en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFSen_US
dc.citation.volume57en_US
dc.citation.issue1en_US
dc.citation.spage26en_US
dc.citation.epage30en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000273783900006-
dc.citation.woscount11-
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