完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 李奕逵 | en_US |
dc.contributor.author | Lee, Ei-Kwei | en_US |
dc.contributor.author | 尉應時, 祁牲 | en_US |
dc.contributor.author | Winston I Way, Sien. Chi | en_US |
dc.date.accessioned | 2014-12-12T02:14:46Z | - |
dc.date.available | 2014-12-12T02:14:46Z | - |
dc.date.issued | 1995 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT840124022 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/60151 | - |
dc.description.abstract | 在本論文中,我們製作供混合光纖同軸傳輸系統使用之多路徑模 擬器,包括數位的衰減,數位的能量合成器 ,並利用最佳化的方法找出模擬 器的參數.另外也製作64-QAM基頻處理電路,包括攪碼器(Scrambler), Reed-Solomon 碼,Convolutional Interleaving及Reed-Solomon 碼的相 關電路包括:頻率合成器(frequency synthesizer),(de-)Multi-plexer, 資料的壓縮,資料的萃取,frame synchronization等. In the thesis we implement the multipath simulator for HFC systems ,including digital attenuator , digital power combiner , and find the para-meters by means of optimization. We also implement 64-QAM baseband processingcircuits including scrambler , Reed-Solomon code , Convolutional Interleaving, and the related circuits of Reed-Solomon Code including frequency synthesizer, (de-)Multiplexer,data compression , data retraction , frame synchronization... etc | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 多路徑模擬器 | zh_TW |
dc.subject | 64-QAM基頻處理電路 | zh_TW |
dc.subject | 瑞德-所羅門 碼 | zh_TW |
dc.subject | 最佳化 | zh_TW |
dc.subject | Interleaving | en_US |
dc.subject | Multipath Simulator | en_US |
dc.subject | 64-QAM baseband processing circuit | en_US |
dc.subject | Interleaving | en_US |
dc.subject | Reed-Solomon Code | en_US |
dc.subject | Optimization | en_US |
dc.title | 供混合光纖同軸傳輸系統使用之多路徑模擬器及64-QAM基頻處理電路製作 | zh_TW |
dc.title | Multipath Simulator for HFC Systems and Baseband Processing Circuit Implementation for 64-QAM Signal Transmission | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
顯示於類別: | 畢業論文 |