以射頻磁控式濺鍍法低溫製備鈦酸鋇鍶薄膜

Abstract

本論文之研究主題,係以射頻磁控式濺鍍法,分別在矽晶片,Pt/TiN/ Ti/Si及Pt/SiO2/Si三種不同的基板上製備鈦酸鋇鍶薄膜.藉由改變基板溫 度,靶材成分比,及氬氣與氧氣分壓比三種製程條件,研究薄膜的晶相,成分 及電性的改變,以期能沈積符合未來動態隨機存取記憶體(DRAM)要求的鈦 酸鋇鍶薄膜.其中基板溫度由室溫至700oC變化,靶材成分比Ba/Sr由8/2 ~3/7,氬氣與氧氣分壓比Ar/O2由1/0變化至變化至1/1,而後在對其進行電 性量測以及材料特性分析.結果首度於結果首度於360oC低溫下沈積高品質 的介電薄膜,當靶材成分比Ba/Sr=0.5/0.5,薄膜厚度150nM,量測頻率100k Hz時,介電常數高達580;漏電流在100kV/cm電場下為0.1uA/cm^2,損失因子 在0.045以下.由上述之特性,鈦酸鋇鍶將可應用於積集密度256M bit以上 DRAM之製作. A series of barium strontium titanate ((Ba1-x,Srx)TiO3,BST) thin films on (1) silicon wafer,(2) Pt/TiN/Ti/Si and (3) Pt/ SiO2/Si substrates were prepared by RF magnetron sputtering with various target compositions,substrate temperatures and Ar/O2 ratios.The range of variations are (1) room temperature to 700oC for substrates,(2)0.8/0.2 to 0.3/0.7 Ba/Sr ratio for target composition,and (3)1/0 to 1/1 for Ar/O2 ratio.The dielectric properties,crystallinity and composition of these films have been studied. High quality BST thin films were obtained at a temperature as low as 360oC,target composition Ba/Sr ratio 0.5/0.5,and film thickness 150nm.The film dielectric constant is 580 at 100kHz,leakage current is 0.1 uA/cm^2 and dielectric loss is less than 0.045 at 100kV/cm.From the above studies,the optimized BST films is suitable for the thin film capacitor in the future 256M DRAM.