完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 郭芳銘 | en_US |
dc.contributor.author | Kou, Fang-Ming | en_US |
dc.contributor.author | 唐佩忠 | en_US |
dc.contributor.author | Tang Pei-Chong | en_US |
dc.date.accessioned | 2014-12-12T02:15:02Z | - |
dc.date.available | 2014-12-12T02:15:02Z | - |
dc.date.issued | 1995 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT840327060 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/60319 | - |
dc.description.abstract | 由於科技之發展日新月異,影像處理技術已逐趨於成熟,但由於影像 需要處理大量資 料,導致計算時間過長過長,當面臨高速動態環境時,常因 計算速度不夠,無法達到即時處理之要求,成為影像處理在動態系統應用中 的一大瓶頸. 而本篇論文之目標即針對即時影像處理之要求,建立一個以 FPGA為硬體架構之高速影像處理系統,利用FPGA可重複規劃及硬體之高速 性,配合其應用環境與目標提出一套簡潔有效率之硬體演算法則.其特色包 括:(1)高速性:利用高速硬體線路設計及雙匯流排架構,可使系統之處理速 度系統之處理速度高達25MHz Pixels (2)彈性:利用可重複利用FPGA可重 複設計之特性,可隨時視應用環境之需要載入不同硬體程式.(3)高整合性: 本系統為一PC Add on Card 與 PC系統有高度整合之功能,可輕易配合 PC 與其他系統做整合. With the development of digital integrated circuits,the techniqueof digital image processing is very advanced now. However,due to the excessive processing time for the huge amount of image data, it usually can not meet the demand of real time processing. Consequently, the implement of digital image processing is limited by the processsing time in the high speed environments. In this paper, we utilize the parallel structure of FPGA and an efficient hardware algorithm to build up a high speed image processingsystem. With the reprogrammability and the high speed of FPGA our image processing system has these properties below. (1)High processing speed: Using parallel processing units in FPGA and the dual bus structure,the image processing system can run at 25MHz pixels' rate (2) Fexibility: Because the FPGA is reprogrammable and on line downloaded, we can easily download the differernt FPGA hardware programs into FPGA depending on the applications environment.(3)Integration: The image system is one PC Add-On-Card based on FPGA. We can easily integrated it with the PC system.Future, through the PC system we can integrate the image processing system with other system. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 影像處理 | zh_TW |
dc.subject | 即時 | zh_TW |
dc.subject | FPGA | en_US |
dc.subject | Real-Time | en_US |
dc.subject | Image | en_US |
dc.title | 以FPGA為即時影像處理之研製製 | zh_TW |
dc.title | FPGA Programming For Real Time Imgae Processing | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電控工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |