MBE成長低溫砷化鎵之電性與缺陷分析

Abstract

自從發現利用MBE低溫成長砷化鎵(LT GaAs)能有效的改善MESFET的 sidegating和backgating之後, 因此吸引了對LT GaAs材料特性的廣泛注 意與研究. 但是到目前為止,仍然對材料缺陷的特性及缺現在電流傳輸所 扮演的角色不是很明膫. 因此, 在本論文中,我們將利用P-I-N中間夾著LT GaAs之結構, 量測電流, 並配合深層能階導納頻譜(DeepLevel Admittance Spectroscopy), 深層能階暫態頻譜(DLTS), 和暫態電容, 對 材料的電性及缺陷做詳盡的探討. 在電流分析中, 含低溫砷化鎵(P- LT-N)元件漏電流比不含低溫砷化鎵層(P-I-N)元件漏電流多兩個數量級, 含低溫砷化鎵漏電流是位於能隙中間的缺陷造成的結合電流( recombination current)所貢獻的, 經由SRH理論分析, P-LT-N元件的載 子生命期τ大約是10 ps, 比P-I-N元件的τ(大約1 ns)大三個數量級左 右, 所以低溫砷化鎵材料的確有較短的載子生命期, 較快的反應率. 在P-LT-N與P-I-N的深層能階導納頻譜裡, 我們觀察到兩個缺陷能階, T1 和T2, 其中T1(Ea=0.60 eV, σ=5.26e-13c㎡)只有在P-LT-N元件中出現, 所以與低溫砷化鎵的成長有關. 並比較其他研究結果, T1比較接近EL3能 階, 而不是EL2能階. 並比較P-LT-N中T1的捕捉生命期(capture lifetime)與由電流分析得到的結合生命其, 兩者數量級差不多, 所以推 論T1可能是造成P-LT-N元件漏電流的結合中心.因為T2(Ea=0.10eV, σ=2.19e-18c㎡)同時出現在P-LT-N與P-I-N之中, 所以我們認為T2為砷化 鎵中的native defects或是磊晶過程中MBE系統雜質所產生的能階. 最 後利用DLTS與暫態電容量測材料中的深層能階, 在DLTS的量測中, P-I-N 元件裡沒有發現到任何深層能階, 在P-LT-N元件中觀察到兩個深層能階, 在250℃左右發現的minoritycarrier trap與發生在400℃左右的majority carrier trap(T3),並配合暫態電容分析, 發現minority arrier trap激 發與捕捉過程都有活化能存在而且兩個過程的活化能與捕捉截面積大小都 差不多, 因此推論為As precipitates形成的buried Schottky barrier所 造成的.至於T3, 為第一次在低溫砷化鎵觀察到的能階, 需要更進一步的 研究確認. Recently, GaAs layers grown at low substrate temperatures (LT-GaAs) by molecular beam epitaxy have attracted considerable attention due to theiruseful properties for elimination of sidegating or backgating in GaAs MESFETs.In this thesis, electrical properties and deep levels in the annealed LT-MBEGaAs layers were investigated by current measurements, admittance spectroscopy,deep level transient spectroscopy (DLTS), and transient capacitance techniquesusing P-I-N structure with part of the intrinsic layer grown at 300℃. Comparisons are made between the LT and normally grown samples. The current of the LT sample is about two order of magnitudes higher than that of the normally grown sample in both forward and reverse bias. From temperature-dependent analysis, the leakage current of the LT sample is contributed by therecombination current through defect levels around the madgap, from which arecombination lifetime of 9.4e-12 sec was obtained. Two electron traps were detected by admittance spectroscopy in P-LT-N diodes. The dominant trap, labelled as T1 level, was found with an activation energy of 0.60 eV and an electron capture cross section of 5.26e-13 c㎡. It isbelieved to be introduced by the As-rich LT layer. From the Arrheniusplots, T1is more close to the EL3 level than to the EL2 level. Because of the similarorder of magnitude in lifetimes obtained by current analysis and admittance spectroscopy, T1 could be the recombination centers responsible for the forwardI- V characteristics in the P-LT-N diode. On the other hand, DLTS measurements showed one minority-carrier trap and one majority- carrier trap which was labelled T3. In transient capacitance measurement, the activation energy and capature cross section of emission process (Ea=0.34eV, σ=3.76e-18 c㎡) is found to be similar to those of capture process (Ea=0.36eV, σ=1.03e-17 c ㎡). Thereforethe minority-carrier trap was speculated to be originated from As precipitates,as the buried Schottky barrier model predicted. The level T3, which was observedfor the first time, is a new level peculiar to LT-GaAs layers. Further work isneeded in order to make a more definite indentification.