低電壓觸發矽控整流靜電放電保護結構之徹底研究

Abstract

本論文首先對互補式金氧半低電壓觸發矽控整流靜電放電保護結構作一 徹底之研究。此 保護電路結構包含了一個 n 型金氧半場效電晶體當觸 發元件及一個矽控整流為主要保 護元件。實驗晶片設計了兩個參數，一 個是 n 型金氧半場效電晶體的閘極長度，一個 是矽控整流的陽極到陰 極的距離，此晶片也測量其人體模型與機器模型條件下的靜電放 電。所 建立的故障模式已成功重現人體模型與機器模型靜電放電的破壞臨界電壓 量測值 ，且電子掃描照片的結果支持了故障模式的假設。從此模式，可 以對佈局提出設計規範 ，且矽控整流的陽極到陰極的距離被判定為一個 決定靜電放電破壞臨界值的關鍵性因素 。此靜電放電測試晶片亦量測其 暫態特性響應，不但量化靜電放電發生時少數載子高注 入的行為，而且 可以決定保護電路對正常電路操作的影響。亦執行考慮晶格溫度變化的 混合式電路與元件模擬，深入了解保護結構在靜電放電應力下的暫態響應 行為o The thesis presents for the first time a comprehensive study of lowvoltage triggering SCR (Silicon-Controlled Rectifier) ESD (Electro-StaticDischarge) protection structures in a CMOS process. This merged protectionstructure consists of an n-MOSFET triggering device and a p-n-p-n SCR primaryprotection device. Experimental test chip has been fabricated with n-MOSFETgate length and SCR anode-to cathode spacing both as parameters, and havebeen characterized under Human-Body-Model (HBM) and Machine- Model (MM) condi-tions. A failure model has been established and has successfully reproducedthe measured HBM and MM failure threshold voltages. The assumption for deriv-ation of this model has been validated by SEM results. From the model, layoutguidelines can be drawn and the anode-to-cathode spacing has been judged asa key factor determining the failure threshold. Transient characterizationof the protection structure has further been performed, which can essentiallyprovide quantitative understanding of the high-level injection behavior inthe ESD event as well as can be utilized to determine the effect of the SCRprotection on the normal circuit operation. Also studied is the mixed-modecircuit and device simulation considering the lattice temperature, offeringin-depth insight into the response of the protection structure under ESDstress.