次臨界互補式金氧半匹配誤差分析

Abstract

次臨界互補式金氧半導體匹配誤差分析在低功率、低電壓的領域裡是 眾多重要的研究課題之一。我們已量測及分析不同大小、距離及方向的 N 型與 P 型金氧半導體之匹配誤差。這些電晶體都被加以背閘逆向及順向 偏壓。我們首先觀察到，電晶體在次臨界區存在著比過臨界區更大的誤差 。此種現象是因為在次臨界區中，電流與閘極電壓及製程參數成指數關係 的結果。如將背閘逆向偏壓加入考慮，我們發現電流誤差隨著背閘逆向偏 壓的加劇而增大。另一方面，電流誤差會隨著背閘順向偏壓的增大而改善 。經由量測不同面積、距離及方向所得的數據，我們發現到：(1) 小尺寸 的電晶體不僅誤差更大，並且對於背閘偏壓更加敏感；(2) P 型電晶體的 誤差較 N 型大，而且對於背閘電壓也較不敏感；(3) 在佈局時，電晶體 相距越近以及閘極保持水平方向將可改善匹配誤差。除了實驗，我們也推 導一個解析式的統計模型。此一模型可以成功地重現在次臨界區對不同元 件在不同偏壓下所量測的結果。在此模型中，電流誤差被表達成以製程參 數變動為因子的函數。所粹取出的參數變動值與元件面積平方根倒數成正 比，符合前人所提的理論。 Subthreshold CMOS mismatch analysis is one of the most important issues in the low power, low voltage field. We have measured the current mismatch of identically drawn p- and n-type MOSFETs (similar to current mirror) operating in subthreshold or weak inversion to above-threshold regions with different gate width-to-length ratios, transistor spacing distances, and layout orientations. These transistors were characterized with back- gate reverse and forward biases. The first observation is that devices operating in subthreshold region exhibit larger mismatch than those in above-threshold region. This is due to the exponential dependence of current on gate and bulk voltages as well as process parameters. In the case of back-gate reverse bias, we have found that current mismatch increases as the magnitude of back-gate reverse bias increases. On the other hand, with the supply of back-gate forward bias, the current mismatch decreases with increasing the back-gate bias in all operation regions. With the data measured from devices with difference sizes, spacing distances, and layout orientations, we have found that (i) small size devices not only exhibit larger mismatch, but also are more sensitive to back-gate bias; (ii) p- type MOSFET exhibits larger mismatch and less sensitive to back- gate bias than n-type MOSFET; and (iii) drawing transistors closely and in horizontal orientation improves the match. We have also derived an analytical statistical model that has successfully reproduced the mismatch data in weak inversion for different back-gate biases and device dimensions. With this model, the current mismatch can be expressed as a function of the variations in process parameters, namely, flat-band voltage and body effect coefficient. The extracted process variations are shown to appropriately follow the inverse square root of the device area.