低溫(850C)N2O製程在金氧半場效電晶體及薄膜電晶體製造上的應用

Abstract

在本論文中,我們探討了一低溫(850C)兩步驟N2O退火製程(LTN)用以改 善氧化層特性.即使在此低溫之下改善依然相當明顯,包括有較低的電子捕 捉率,較大的崩潰電荷和較少介面態的產生,並增強n-和p-通道金氧半場效 電晶體的熱載子免疫力.所有這些效應都可用因氮加入矽/二氧化矽介面加 強了介電質強度來解釋.由於低熱預算之故,此一LTN製程對深次微米極大 型積體電路製程而言是一很好的選擇. 我們也研究了N2O退火效應對複晶矽薄膜電晶體特性之影響.導通特性已被 改善.然而,我們發現對N2O退火時間而言存在一最佳條件.當超過此一最佳 退火時間,改善的程度開始劣 化.三種可能的機制被用來解釋此一現象.我 們認為此一最佳N2O退火時間可能為閘極氧化 層及通道複晶矽層厚度之函 數. In this thesis, we have investigated a low temperature(850C) two-step N2O- annealing(LTN) process to improve the oxide quality. Even at this low tempe- -rature the improvements were significant, including the lower electron trapping, the higher charge-to-breakdown and the less generation of interface states, the enhanced hot carrier immunity for the n- and p- channel MOSFET. Allof these effects could be explained by the nitrogen incorporation at the Si/SiO2 interface to enhance the dielectric strength. Due to its low thermal budget, this LTN process is a good candidate for applications in the deep- submicron ULSI MOSFET process. We have also studied the effects of the N2O-anneal on the characteristics of the polysilicon TFT. The ON-characteristics were improved. However, we have found that there exists an optimum condition for the N2O-annealing time. When this optimum annealing time was exceeded, the improvements degraded. Three possible mechanisms were used to explain this phenomenon. We suggested that the optimum N2O-anneal time might be a function of the thickness of the gate oxide and the channel polysilicon film.