標題: | 液相沉積絕緣膜在複晶矽薄膜電晶體之應用研究 Application of Liquid-Phase Deposited Oxide to Poly-Si TFT |
作者: | 鄭志男 Jeng, Jyh-Nan 葉清發 Ching-Fa Yeh 電子研究所 |
關鍵字: | 液相沉積;Liquid-Phase Deposited |
公開日期: | 1995 |
摘要: | 本論文主要探討液相沉積絕緣膜在複晶矽薄膜電晶體的應用。其 分為四個部分,第一部分為傳統低溫的應用:我們成功地發展出高品 質薄化的液相沉積絕緣膜及應用在複晶矽薄膜電晶體的閘極絕緣層。 氫化前,這複晶矽薄膜電晶體有臨限電壓3.9V、次臨限波動率 (subthrehold swing) 0.57V/decade和開關電流比可達到2×106。薄化 閘極絕緣層也顯示一些優點,諸如,臨限電壓及波動率的下降、電特 性的均勻性改善和短通道效應的消除。此外,比較化學氣相沉積閘極 絕緣膜的複晶矽薄膜電晶體,此薄化液相沉積純緣膜元件有較佳的穩 定性。 第二部分為高溫的應用:液相沉積絕緣膜第一次被應用在高溫複 晶矽薄膜電晶體上的閘極絕緣層。我們也對此高溫製程在複晶矽薄膜 電晶體之性能及信賴性的影響,進行廣泛的研究,由於液相沉積緣膜 結構的改變及片電阻(sheet resistance)的下降,此高溫複晶矽薄膜電晶 體有極佳的性能。 第三部分為低熱能支出(low thermal budget)的應用:N2O快速退火 第一次被應用複晶矽薄膜電晶體上,此退火能有效地改善元件的性能 和降低熱能支出。實驗結果發現N2O快速退火時的氮化效應及高溫快 速退火對液相沉積純緣膜和複晶矽層的效應,是改善元件電性的兩大 主因。 最後部分為在罩幕上的應用:我們利用選擇性液相沉積絕緣膜成 長技術,來成長絕緣膜當罩幕,成功地發展出一種特殊複晶矽薄膜電 晶體。此元件很適合高積體度的靜態隨機存機記憶體的應用。此外, 這特殊元件在NH3氫化後,有極佳的電性. In this work, the applications of liquid-phase deposited (LPD) oxide to poly-Si TFTs have been studied. There are four subjects. In the first part, the application of LPD oxide to low-temperature processed (LTP) poly-Si TFTs is developed. A high quality thiner LPD oxide (10 nm) was successfully developed and applied as gate oxide to LTP poly-Si TFTs. For the poly-Si TFTs before hydrogenation, thereshold voltage (Vt) of 3.9V, subthreshold swing (S) of 0.57V/decade and ON/OFF current ratio of 2X10^6 are obtained. Moreover, scaling down gate oxide thickness also reveals several advantages, such as thereduction of Vt and S, the improvement of electrical characteristics uniformity and the endurance of short- channel effect. Compared to LTP TFTs with CVD gate oxide, the devices with ultra-thin LPD︹ate oxide are quite stable. In the second part, the application of LPD oxide to high- temperature processed (HTP) poly-Si TFTs is developed. Poly-Si TFTs with LPD oxide as gateinsulator have first been fabricatied by using a high-temperature quartz basedtechnology. The thermal effects during high-temperature on TFT performance andreliablity were investigated. The high-temperature devices exhibit much improvement in performance due to the rearrangement of LPD oxide structure andthe reduction of sheet resistance. In the third part, the application of LPD oxide to poly-Si TFTs with low thermal budget is developed. A N2O-anneal process by RTA method have been used to the fabrication of poly-Si TFTs with LPD gate oxide. This process is effective to improve the electrical characteristics and reduce thermal budget.The improvement in electrical characteristics can be attributed to the passivation effect due to incorporated nitrogen on active layer, as well as high-temperature annealing effect on LPD oxide and polysilicon film. In the last part, the applicaion of LPD oxide as a mask is developed. A novel poly-Si TFT has been first developed by using selective LPD SiO2-xFx formation technology as a mask. The TFT is suitable to high-density SRAM circuit applications, and it exhibits excellent electrical characteristics: Vt of 0.52V, S of 0.52V/ decade, ON/OFF current ratios of 2.8X10^7 and field effect mobility of 33.75cm2/V.sec after NH3 plasma treatment. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT840430104 http://hdl.handle.net/11536/60711 |
顯示於類別: | 畢業論文 |