化學機械研磨在溝槽絕緣及複晶矽氧化層之應用

Abstract

本篇論文,首先探討使用化學機械機(CMP)研磨晶片上薄膜層的基本原理. 對化學氣相沉積的二氧化矽及氮化矽而言,機械效應是研磨的主控因子.而 對複晶矽而言,化學效應才是研磨過程的主控因子.實驗顯示,二氧化矽對 氮化矽的蝕刻選擇性很低,因此二氧化矽回蝕時,無法找到適當的阻擋層( etching-stop layer).但是,藉著使用含高氫氧化鉀濃渡及大顆粒的化學 研磨液,可使複晶矽對二氧化矽及氮化矽具有很高的蝕刻選擇性.以複晶矽 回填深溝槽(deep trench)絕緣製程的平坦化上,本論文提出了一種好控制 具有高蝕刻選擇性的化學機械研磨製程,可以得到很好的平坦化.另外在絕 緣技術上,我們開發了一種完全沒有鳥嘴且容易操控的複晶矽回填淺溝槽 絕緣製程.它利用一層氮化矽覆蓋著,複晶矽回填,高蝕刻選擇性化學機械 研磨製程及複晶矽局部氧化.當元件規格降到0.25毫微米以下,二氧化矽回 填淺溝槽絕緣製程是最佳選擇.我們提出一種以化學機械研磨法形成一層 複晶矽覆蓋層,再以濕性選擇性蝕刻回填在主動區上的氧化矽,接著以短時 間的化學機械研磨製程使表面平坦,最後以乾性蝕刻法回蝕.此種方法比傳 統只以化學機械研磨平坦化的製程,可以得到較佳的均勻度,消除凹陷效 應,並降低缺陷密度.此外,我們也發現使用鈦-複晶矽閘極(Ti-polycide), 則包括溝槽角(trench corners)的N型金氧半電容,閘極氧化層在低電場區 有很大的漏電流.使用化學機械研磨機研磨複晶矽層表面,可使其表面比一 般複晶矽層表面平坦.從經由研磨的複晶矽層熱氧化所得到的複晶矽氧化 層,有較低的漏電流和較高的崩潰電壓.相較於一般的複晶矽氧化層,我們 還發現它可獲得較低的電子捕捉速率(electron trapping rate)和較高的 崩潰電荷密度(charge to breakdown).這裡也研究低壓氣相沉積系統( LPCVD)沉積的複晶矽氧化層之特性,因為氧化層和複晶矽的表面平坦度並 沒有變差,所以其氧化層有較佳的絕緣特性. In this thesis, the basic mechanism of the chemical-mechanical polishing(CMP) process has been studied. The mechanical effect is the dominant factorof the removal process for CVD oxide and SiN. However, the chemical removalprocess of polysilicon is the dominant factor of the removal process. Moreover,for the planarization approaches of polysilicon-filled deep trench isolation,we present a well-operated planarization method using a CMP process with highetching selectivity to achieve excellent surface planarity. For the isolationtechnology, an absolutely bird's beak-free and easily implemented polysilicon-filled shallow-trench isolation technology based on the CMP process has been demonstrated successfully. As device geometries are scaled down to the sub-0.25um regime, the oxide-filled trench isolation technology is the most promisingoption. We present a novel planarization of oxide-filled shallow trenchisolation to achieve excellent uniformity and fully planar surface. Moreover,forming Ti-polycide gate leads to a higher leakage current density of trench-corner's gate oxide at low-field bias. The surface of the polysilicon film polished with a CMP process is smoother than that of the unpolished polysiliconfilm. The polyoxide thermally grown on the polished polysilicon film exhibitsa lower leakage current and higher breakdown electric field. Compared to conventional polyoxide, lower electron trapping rate and larger charge to breakdown are found in the polished sample. This work also reports on thecharacteristics of the deposited polyoxide. They exhibit better dielectric properties because the surface roughness is not enhanced during the formationof polyoxide. The characteristics of the polished sample is markedly better than that of the unpolished sample.