標題: | 語言頻帶濾波器之設計 Design of Voice Band Filter |
作者: | 徐志勇 Hsu, Chih-Yung 吳錦川 Jinn-Chuan Wu 電子研究所 |
關鍵字: | 語言頻帶;濾波器;切換電容;voice band;filter;switched capacitor |
公開日期: | 1996 |
摘要: | 隨著科技的演進,無線系統在人們的日常生活中日益普及,而語音信號 是我們可以最容易接收的訊息。為了消除相鄰頻道的干擾以及高頻雜訊的 介入,我們在此論文提出了高階語言頻帶的低通濾波器。為了達到對參數 變化有較低敏感度以及較窄的過渡帶,一開始我們採用五階契比雪夫( Chebyshev)被動式階梯濾波器形式的模型。然後再將其轉換成主動電路的 形式。此外,再提出電容切換模式的方法,設計及模擬我們所需的濾波器 電路。 此濾波器電路乃是採用UMC 0.5 um DPDM的製程技術,將交由國科 會晶片製作中心製造實現,晶片尺寸為1.324x1.118毫米平方。由佈局後 的模擬結果我們可以發現,在三伏特的電源以及五十倍的過度取樣頻率( fs = 250KHz)下,平均功率消耗為0.8毫瓦。通過帶的寬為5.3 KHz,而停 止帶(我們定義在20KHz)的衰減為64分貝。 With the development of technology, wireless system is more and more popular in our daily life, and voice signals are the most common signal that we can directly accept. To avoid the disturbance from other channels and the noises of high frequency, we present a voice band high order low pass filter in the thesis. To achieve the lower sensitivity and the narrow transition band, we start our design with a fifth order Chebyshev LC ladder type filter to be our model and transfer it to an active form. We also usa design method of switched capacitor filter for our circuit. The filter will be implemented with UMC 0.5 um double-poly double-metal (DPDM) CMOS process by chip implement center (CIC). The total die area is 1.324mm x 1.118mm. From the result of post simulation, we find that using 3 volt power supply and 50 times oversampling (fs = 250 KHz), the power consumption is 0.8 mW. The pass band edge (-3 dB frequency) is 5.3KHz and the stop band, which we define at 20 KHz, attenuation is 64 dB . |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT850428069 http://hdl.handle.net/11536/61939 |
顯示於類別: | 畢業論文 |