標題: | 訊框基礎式虛擬時鐘: 兼具延遲和公平保證的訊務排程演算法 Frame-Based Virtual Clock: A Traffic Scheduling Algorithm with Delay and Fairness Guarantee |
作者: | 王瑞吉 Wang, Ruey-Jyi 李程輝 Lee Tsern-Huei 電信工程研究所 |
關鍵字: | 虛擬時鐘;延遲;遲誤;公平;訊務排程演算法;Virtual Clock;Delay;Latency;Fairness;Traffic Scheduling Algorithm |
公開日期: | 1996 |
摘要: | 在此篇論文中,我們提出一種訊務排程演算法,叫做訊框基礎式虛擬時鐘 ,它是建構在流體流的架構上。另外,我們也在封包式網路上提出了封包 式的版本。封包式訊框基礎式虛擬時鐘是針對原有的虛擬時鐘做改進,它 在增加的複雜度可容忍的情況下達到了有界限的公平性 (bounded fairness)。在 ATM 網路中,階層架構的訊框式虛擬時鐘大大的減低了排 序的工作。因此,訊框式虛擬時鐘適合使用在寬頻網路中。 In this thesis, we propose a traffic scheduling algorithm called frame-based Virtual Clock in fluid flow case. We also propose itspacket version in packet network. Packet frame-based Virtual Clockwhich achieves bounded fairness is a modification of original Virtual Clock with tolerable increase of implementation complexity.In ATM network, packet frame-based Virtual Clock of hierarchicalarchitecture greatly reduce the sorting mechanism. As a result, frame-based Virtual Clock is suitable for broadband network. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT850436008 http://hdl.handle.net/11536/62081 |
顯示於類別: | 畢業論文 |