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dc.contributor.author許立群en_US
dc.contributor.authorXu, Li-Qunen_US
dc.contributor.author李鎮宜en_US
dc.contributor.authorLi, Zhen-Yien_US
dc.date.accessioned2014-12-12T02:18:18Z-
dc.date.available2014-12-12T02:18:18Z-
dc.date.issued1996en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT854428001en_US
dc.identifier.urihttp://hdl.handle.net/11536/62486-
dc.description.abstract3D computer graphics has becoming more and more important in modern multimedia and virtual reality systems. In this area, texture mapping is one of the most successful techniques which can make images look more realistic and complex. In this thesis, a perspective texture mapping processor (PTMP) is designed and implemented to improve the texture mapping performance of computer graphics. The PTMP can give the proper effort of foreshortening on texture mapped polygon. The hardware of rasterization and anti-aliasing is incorporated into PTMP.The features of this design include modified four sided polygon scan-converter, logarithm space divider, and simplified algorithms for anti-aliasing. To enhance rendering speed and throughput, the fully pipelined architecture is designed. By analyzing data flows and operations, many resource sharing techniques can be utilized to reducehardware cost. The post layout simulation results show that the system can operate up to 71MHz. That is, the pixel rate is 17.85M pixels per second and 158.67K 10 * 10, Z buffered, polygon rate per second can be achieved. The gate count of the PTMP is about 30K, and the die size is 7522mm*6107mm. The whole chip is designed and implemented with COMPASS 0.6mm HP CMOS cell library, and it is currently under fabrication through NSC/CIC MPC services.zh_TW
dc.language.isozh_TWen_US
dc.subject紋理貼圖zh_TW
dc.subject描繪zh_TW
dc.subject消除鋸齒zh_TW
dc.subject透視zh_TW
dc.subject吞吐量zh_TW
dc.subject管線化zh_TW
dc.subject電子工程zh_TW
dc.subjectTexture Mappingen_US
dc.subjectRasterizationen_US
dc.subjectAnti-aliasingen_US
dc.subjectPerspectiveen_US
dc.subjectThroughputen_US
dc.subjectPipelineen_US
dc.subjectELECTRONIC-ENGINEERINGen_US
dc.title應用於三維電腦圖學中具有透視效果之紋理貼圖單元之設計zh_TW
dc.titleA Novel Processor Architecture for 3D Graphics Perspective Texture Mappingen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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