2.4-GHz金氧半射頻低雜訊放大器設計與分析

Abstract

由於CMOS技術日益成熟並具有高整合性與低成本，使用CMOS技術實 現射頻IC電路的研究越來越蓬勃。低雜訊放大器為射頻前端電路之一重要 元件，在本篇論文中提出一個2.4GHz金氧半低雜訊放大器，其架構為串接 電感回授。並由分析中可知利用此一架構可同時達到阻抗匹配與雜訊匹配 。模擬結果如下:在頻率為2.4GHz時雜訊指數為2.9dB，增益為20dB及-1dB 功率飽合點在輸入端為-28dBm. 平面電感為射頻前端電路之重要元件 ，由於耦合及以矽為基底之關係，若要準確地模擬電感的特性必須使用全 波分析軟體，目前已可以達到品質因素50%之改善。並由實驗可知，模擬 結果與實驗結果相近且誤差在10-15%。 Recently, RF integrated circuit design based on CMOS technology has receivedmuch attention owing to the low cost, high integrability, and maturity. Low noise amplifier(LNA) is the important element in the receiver for good sensitivity. In this thesis, a single-ended 2.4GHz CMOS LNA is designed and fabricated with cascoded source inductive feedback(SIF) topology. An optimum noise performance and inputmatching is examined to be simultaneously achieved using this topology. The simulation result gets a NF of 2.9dB, a gain of 20dB at 2.4GHz, and a P-1dB compression point referred to input of -28dBm. Integrated planar inductor has the advantage not only size reduction for band selection but also for optimum noise measure. While the inductance and the related Q value are limited and are not easily predicted because of the mutual coupling andresistive Si substrate. This problem is overcome through using the full- wave EM simulation. It is indicated that the quality factor Q has been improved up to 50%.Thesimulation results are verified to be closely to those by measurement. The error between the simulation and the measurement are within 10-15%.