CMAC類神經網路之超大型積體電路設計

Abstract

本論文的目的在規劃一個CMAC類神經網路系統，包括核心的CMAC類神經 網 路晶片及週邊相關電路系統的規劃。使用ASIC的設計方式能夠使CMAC 架構更簡潔，速度上能夠更快，及有更好的擴充性。這將使的CMAC的應用 更具實用性。 我們使用國科會晶片設 計製作中心(CIC)所提供的Cell-based的設計發展環境，去設計整個CMAC 理論的核心晶片。在類神經參數的選取上，我們選用特殊的規格，以便方 便電路的製作。同時我們也改善定址法，使得不需要用到hashing的方法 就可符合設計要求，使得電路更簡潔。使用CIC所提供的電路驗證軟體， 證明我們的晶片設計是正確無誤的。並且使用SmartModels進行整個電路 板的模擬，模擬在IC製造完成之後，搭配週邊電路的工作情形。最後我們 並模擬所設計的CMAC類神經網路晶片學習一個非線性的函數，證明這個電 路有學習的功能。 The object of this thesis is to design a Cerebellar Model Articulation(CMAC) neural network hardware system including the kernel CMAC chip and other external circuits. ASIC design process is used to implement CMAC neural network. It makes the architecture of the system more concise and reduces the CAMC system respond time. The module design method allows future expansion. The CMAC chip designed can be apply in practical engineering problem. In this paper, we use the Cell-Based design environment which is supported by CIC to design the kernel CHIP of the CMAC neural network system. We arrange some specific parameters in our CMAC system in a special to make circuit implementationeasier. Improving the mapping from association memory to physical memory reduces the required memory, so hashing is not necessary and the mapping function circuit becomes simpler. Finally, we use the IC checking and simulation tool to verify the design. We also rum system board simulation by SmartModels to make sure the CMAC chip is compatible with the external circuits.