完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 蔡銘憲 | en_US |
dc.contributor.author | Tsai, Ming-Hsien | en_US |
dc.contributor.author | 祁甡 | en_US |
dc.contributor.author | Chi, Sien | en_US |
dc.date.accessioned | 2014-12-12T02:19:20Z | - |
dc.date.available | 2014-12-12T02:19:20Z | - |
dc.date.issued | 1997 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT863124011 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/63350 | - |
dc.description.abstract | 近來,由於複晶矽薄膜電晶體(poly-Si)應用在主動矩陣式液晶顯示器的驅動電路深具潛力。其中晶界的存在對元件特性具有決定性的影響,所以要得到高性能的複晶矽薄膜電晶體須有效地減少在複晶矽通道的缺陷。主要有兩個方向被用來減低晶界所造成的效應,其一是使複晶矽薄膜的晶粒(grain)變大;另一是藉鈍化使消除在晶界處的懸浮鍵,而針對鈍化效應會使複晶矽薄膜電晶體的特性改善,但卻面臨一些不穩定性的問題。 在本論文中,我們利用乙矽烷(SI2H6) 沈積的非晶矽亂度較大,但其結晶潛伏期較長。針對用甲矽烷或乙矽烷沈積的元件分別經氨氣(NH3)或笑氣(N2O)電漿的鈍化處理,我們發現電漿鈍化處理可以有效改善元件特性,這些在電漿處理過程中,藉擴散進入複晶矽通道及其和閘極介電層的原子,有效地降低了元件中的缺陷密度。另外,閘極介電層的漏電流和崩潰電壓也改善了,這是由於氮或氫的參與。同時我們也將甲矽烷和乙矽烷沈積得到的元件針對其電漿鈍化效應做一個比較;其中由電性量測我們得到用乙矽烷沈積並經氨氣電漿處理過的複晶矽薄膜電晶體的電子遷移率可達169.cm2╱V.sec;開關電流比可達8.07×108。除此之外,我們用了閘極偏壓,汲極偏壓和熱載子效應對經電漿鈍化過的複晶矽薄膜電晶體進行可靠度分析。發現用乙矽烷沉積並經過笑氣(N2O)電漿處理過的元件具有較佳的熱載子可靠度。 | zh_TW |
dc.description.abstract | Recently,Polycrystalline silicon thin film transistors are receiving lots of attention of their applications in active-matrix liquid crystal displays (AMLCDs) with on-glass integrated driver circuits. Grain boundaries exerts a profound influence on device performance. Therefore, reduction of defects in poly-Si films is required for realizing high performance poly-Si TFTs. There are two approaches that could be taken to reduce the grain boundary effects. One is to reduce the area of grain boundaries by enlarging the grain size in the poly-Si film. The other is to remove defect density at grain boundaries by passivation. However, poly-Si TFTs is subjected to the instability due to plasma passivation. In this thesis, disilane (Si2H6) gas was used to deposit amorphous silicon (a-Si) film by low-pressure chemical vapor deposition (LPCVD). Then, a-Si films were transferred to poly-Si films with larger graing size (~1 u m). The larger grain size is due to the higher disorder in these a-Si films. However, the crystallization time and incubation time is also longer. All devices were passivated by NH3 or N2O plasma treatments. It is found plasma passivation have been investigated to improve the electrical properties of poly-Si TFTs . The plasma passivation effects for SiH4-deposited and Si2H6-deposited poly-Si TFTs have been compared each other. It is clear that the field effect mobility 169.8 cm2╱V.sec, the on/off current ratio 8.07×108 can be achieved by the Si2H6-deposited poly -Si TFTs with NH3 plasma treatment. In addition, the gate bias stress, drain bias stress and hot carrier bias stresses were performed to examine the reliability of plasma-passivated popy-Si TFTs. It is found that hot carrier effects for the N2O plasma passivation on the poly-Si TFTs perform well than for the NH3 one. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 電晶體 | zh_TW |
dc.subject | 鈍化效應 | zh_TW |
dc.title | 複晶矽薄膜電晶體電漿鈍化效應及可靠度之研究 | zh_TW |
dc.title | Study and the Performance and Reliability of Plasma-Passivated Polycrystalline Sillicon Thin-Film Transistors | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
顯示於類別: | 畢業論文 |