標題: | 高頻電流模式連續時間階梯型帶通濾波器之設計 THE DESIGN OF CMOS CURRENT-MODE CONTINUOUS-TIME VHF BANDPASS LADDER FILTER |
作者: | 游文華 Win-Whar Yaw 吳重雨 Chung-Yu Wu 電子研究所 |
關鍵字: | 高穿透零點;低穿透零點;轉阻放大器;轉導放大器;N形阱區雙層複晶矽雙層金屬;with transmission zero higher than center frequency;with transmission zero lower than center frequency;transresistance amplifier;transconductance amplifier;N-well double-poly-doubly-metal |
公開日期: | 1998 |
摘要: | 本論文主要是分析研究互補式金氧半(CMOS)特高頻(VHF)連續性(Continuous-time)電流模式階梯型濾波器,並完成三組電路:1.具有高穿透零點(with transmission zero higher than center frequency)六階階梯型濾波器.2.具有低穿透零點(with transmission zero lower than center frequency)六階階梯型濾波器.3,中心頻率為50M Hz,頻寬為9.55M Hz之六階巴特沃斯(Butterworth)階梯型濾波器.
首先,我們先設計完成可調式寬頻轉阻放大器(transresistance amplifier)與轉導放大器(transconductance amplifier)二組電路,當我們將電晶體雜散電容列入考量及加入一線性電容時,則此跨阻-電容,跨阻-跨導架構,可分別視為特高頻(VHF)二階帶通及低通濾波器,而我們利用此二組架構做為基本模組(cell),配合電路的狀態函數(state function)便可來實現上述三組電路.
此晶片是採用聯華電子(UMC) 0.5um N形阱區雙層複晶矽雙層金屬(N-well double-poly-doubly-metal) CMOS技術(technology)的製程參數透過HSPICE模擬軟體加以模擬,該電路中心頻率為 50MHz,消耗功率738mW(若不含電壓-電流,電流-電壓之介面為446mW),此晶片面積為1650x1650um In this thesis, the COMS VHF Continuous-time current-mode ladder filter are proposed and analyzed. Morever, the three circuits are also proposed: (1) RLC bandpass ladder filter with transmission zero higher than center frequency. (2) RLC bandpass ladder filter with transmission zero lower than center frequency (3) Central frequency is 50MHz; bandwidth is 9.55MHz of the sixth order Butterworth ladder filter. At first, the adjustable wide-bandwidth transresistance amplifier and the transconductance amplifier are proposed. When the parasitic capacitance of the transistor and the linear capacitance are considered. The two circuits of RM-C and RM-GM can be seen as bandpass and lowpass filters. Finally, the VHF bandpass ladder filters can be constructed by the two basic cells and state functions. The VHF bandpass ladder filters are simulated by UMC 0.5um DPDM CMOS technology parameters. It's central frequency is 50MHz, power consumption is 738mW(without the voltage-to-current, current-to-voltage circuits is 446mW)and chip areas is 1650x1650um |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT870428003 http://hdl.handle.net/11536/64283 |
Appears in Collections: | Thesis |