VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes - Comments

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Huang, KY	en_US
dc.date.accessioned	2014-12-08T15:01:53Z	-
dc.date.available	2014-12-08T15:01:53Z	-
dc.date.issued	1997-04-01	en_US
dc.identifier.issn	0916-8508	en_US
dc.identifier.uri	http://hdl.handle.net/11536/642	-
dc.language.iso	en_US	en_US
dc.title	VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes - Comments	en_US
dc.type	Letter	en_US
dc.identifier.journal	IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES	en_US
dc.citation.volume	E80A	en_US
dc.citation.issue	4	en_US
dc.citation.spage	795	en_US
dc.citation.epage	796	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	資訊工程學系	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Department of Computer Science	en_US
dc.identifier.wosnumber	WOS:A1997WW39600027	-
dc.citation.woscount	0	-
顯示於類別：	期刊論文