完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 吳俊杰 | en_US |
dc.contributor.author | Jiwnn-Jye Wu | en_US |
dc.contributor.author | 葉清發 | en_US |
dc.contributor.author | Ching-Fa Yeh | en_US |
dc.date.accessioned | 2014-12-12T02:20:44Z | - |
dc.date.available | 2014-12-12T02:20:44Z | - |
dc.date.issued | 1998 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT870428030 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/64313 | - |
dc.description.abstract | 液相沉積二氧化矽對光阻具有選擇性沉積的特性,根據此一獨特的特性我們發展出一種不須回蝕刻步驟卻可應用在積體電路上的淺溝隔離技術。在此論文中,我們將此種技術稱為選擇性液相沉積淺溝隔離技術。 選擇性液相沉積淺溝隔離技術的製程步驟順序敘述如下:一開始用光阻蓋住元件區域,然後利用矽蝕刻技術來形成隔離區的淺溝,接著用選擇性液相沈積方式的氧化膜來回填淺溝,填滿淺溝後,再將元件區域上的光阻去掉,最後長一層薄的犧牲氧化層以及對氧化膜進行高溫熱處理使之緻密化,然後去掉犧牲氧化層就完成了選擇性液相沉積淺溝隔離技術的所有製程。 首先,我們確認選擇性液相沈積氧化膜填縫隙的能力比傳統化學氣相沈積氧化膜來的優越,看到它可以將大高寬比的窄溝不留縫隙的填滿。接著,我們以所提出的選擇性液相沉積淺溝隔離技術來製作諸如電容器、n+/p接面二極體、n+/n+金屬閘極隔離電晶體及複晶閘極N型場效電晶體等測試元件來驗證此種隔離技術的可行性,實驗結果顯示出此種隔離技術下製作的元件擁有良好的電特性。除此之外,我們也探討了不同的熱處理製程對此淺溝隔離技術在隔離能力上以及元件電特性上的影響,研究指出為了可以得到更好的元件電特性,在對氧化膜進行高溫熱處理使之緻密化前的短時間氧化以形成薄的犧牲氧化層是有其必要性的。 | zh_TW |
dc.description.abstract | Selective deposition against photoresist for liquid-phase deposited oxide has been found. According to this unique characteristic, the shallow trench isolation technology without etching back in integrated circuits is developed. In this thesis, we call it selective liquid-phase deposition shallow trench isolation (SLPD-STI) technology. SLPD-STI processes begin with photoresist masked silicon etching on a silicon wafer. Selective liquid-phase oxide deposition is followed to refill the shallow trench. After that, photoresist mask on the active device region is removed. At last, thin sacrificial oxide is grown and a SLPD oxide densification process is performed. Then, the processes of SLPD-STI technology are finished after removing sacrificial oxide. At first, the excellent gap filling ability of the selective liquid-phase deposited oxide over conventional CVD oxide is confirmed. It is found that high aspect-ratio narrow trench can be filled with selective liquid-phase deposited oxide free of voids. In order to verify the feasibility of SLPD-STI technology, we fabricate test devices such as capacitors, n+/p junction diodes, n+/n+ metal-gate isolation transistors and nmos poly-gate transistors, with our proposed SLPD-STI technology. It is demonstrated that good electrical performances of devices fabricated by SLPD-STI technology can be obtained. In addition, the effects of different thermal treatments on the isolation efficacy and devices electrical characteristics for SLPD-STI technology are also investigated. It indicates that short-time oxidation before refilled-oxide densification is necessary for SLPD-STI technology to obtain better electrical performances of devices. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 選擇性 | zh_TW |
dc.subject | 液相沈積 | zh_TW |
dc.subject | 氧化矽 | zh_TW |
dc.subject | 淺溝隔離技術 | zh_TW |
dc.subject | Selective | en_US |
dc.subject | Liquid-Phase Deposition | en_US |
dc.subject | Oxide | en_US |
dc.subject | Shallow Trench Isolation Technology | en_US |
dc.title | 選擇性液相沈積氧化矽絕緣膜在淺溝隔離技術上之應用開發 | zh_TW |
dc.title | The Application of the Selective Liquid-Phase Deposited Oxide to the Shallow Trench Isolation Technology | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |