標題: 利用P型浮動閘極材料改善N通道快閃記憶體的性能與可靠性之研究
Improved Performance and Reliability of N-channel Flash Memories with P-type Floating-gate Material
作者: 何之浩
Zhi-Hao Ho
莊紹勳
Steve S. Chung
電子研究所
關鍵字: P型浮動閘極;快閃記憶體;性能;可靠性;p-type floating gate;flash;performance;reliability
公開日期: 1998
摘要: 近幾年來,快閃式記憶體(Flash Memory)已被廣泛地應用成為主要的非揮發性記憶體產品。就一個先進的快閃式記憶體元件設計來說,高效能(Performance)與高可靠性(Reliability)是兩個主要的考量重點。在過去,快閃式記憶體的設計改良主要集中在新的元件結構、源極與汲極工程(Source/Drain Engineering)、通道工程(Channel Engineering),以及改變元件的操作方式等。 本研究論文主要在提出一個新的設計方向,即是以浮動閘極工程來改善元件特性。其中,吾人首次採用P型浮動閘極N通道的快閃式記憶體來進行元件特性的改善。根據實驗結果,吾人發現:(1)快閃式記憶體其基本的電流特性與浮動閘極的摻雜種類(Doping Type)無關。(2)與傳統的N型浮動閘極快閃記憶體相比較,P型浮動閘極的快閃記憶體擁有較佳的效能與可靠性,換言之,P型浮動閘極快閃記憶體具有較快的寫入/抹除(Program/Erase)速度;較大的操作窗口(Operation Window)、以及較佳的擾動特性(Disturb)與耐久度(Endurance)。此外,吾人亦發展出一套改良式的懸浮閘極量測方式(Floating-gate Measurement Technique),可用來觀察摻雜種類之不同對寫入動作所造成的影響,其中P型浮動閘極快閃記憶體之所以具有較好的特性,主要是由於其注入的電子與浮動閘極內的電洞產生電性中和(Neutralization)的效果所致。最後,由本研究論文可知,P型浮動閘極快閃記憶體的元件結構比傳統元件結構具有更多的優點,也更適於在未來多階(Multi-level)快閃記憶體上的應用。
Recently, the flash memory has been widely employed in nonvolatile semiconductor memories. For the design of advanced flash memories, the performance and reliability are the major concern. In the past, the design of flash memories is mainly focused on the development of the novel cell structure, the source/drain engineering, the channel engineering, and the operation methods. In this thesis, we proposed a new design viewpoint by floating-gate engineering. First, a new n-channel flash memory cell is developed for the first time with the p-type floating-gate material. From the experimental results, several new issues have been addressed in this thesis: (1) The current-voltage characteristics of flash memories is independent of the floating-gate doping. (2) The p-type floating-gate flash cell has much better performance and reliability than the conventional n-type floating-gate one. Namely, the p-type floating-gate flash cell has faster programming/erasing speed, larger operation window, better read-disturb and endurance characteristics. Then, a modified floating-gate measurement technique is developed to observe the doping effect on the programming characteristics. The enhancement of p-type floating-gate cell is due to neutralization of injected electrons with excess holes. Finally, the flash memory cell with p-type floating-gate structure is more advantageous for high performance cell design and in particular for future multi-level flash memory applications.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT870428112
http://hdl.handle.net/11536/64403
顯示於類別:畢業論文