标题: | 积体电路生产线上结合缺陷数与缺陷群聚之Hotelling T2多变量管制图 Using Hotelling T2 Control Chart for Clustered Defects in IC Fabrication |
作者: | 吴照华 Wu Chao-Hwa 唐丽英 Prof. Lee-Ing Tong 工业工程与管理学系 |
关键字: | 积体电路;晶圆;缺陷;群聚现象;良率;统计制程管制;Integrate circuit;Hotelling T2 control chart;defect;cluster;yield;statistical process control (SPC) |
公开日期: | 1999 |
摘要: | 由于全球资讯业蓬勃的发展,积体电路(Integrated Circuit, IC)制造业的国际竞争力成为众所瞩目的焦点。对一般IC的半导体工业厂商而言,产品的良率(yield)为评估公司生产能力的重要指标之一。而在复杂的晶圆制程中,缺陷(defect)的产生是不可避免的,而有些缺陷会导致晶片(chip)的失效(fault)而降低产品的良率,因此为有效地提升IC产品的良率,在IC生产线上,针对在制品实行统计制程管制(statistical process control, SPC)以监控制程缺陷的分布及掌握制程状况是非常重要的。 传统对晶圆上以缺陷数为品质特性所制作的缺陷数管制图(c-chart)是根据卜瓦松(Poisson)分配而绘制,但是在超大型积体电路(very large scale integration,VLSI)的制造技术下,随着晶圆面积的增加,晶圆上缺陷的分布出现群聚(clustering)的现象,因而违反了卜瓦松分配的假设,导致缺陷数管制图不再适用,而目前所提出的一些相关之修正缺陷数管制图尚有不完善之处。 本研究的主要目的是考虑在缺陷出现群聚现象的情况下,提出一套简便且合理的晶圆缺陷数管制图绘制方法,以有效的管制晶圆表面的缺陷数。本研究所提出的方法为结合缺陷数及缺陷群聚严重程度对良率的影响,使用Hotelling T2多变量管制图(Multivariate Quality Control Chart)来对缺陷数及缺陷群聚现象同时进行监控。本研究所提之管制图经新竹科学园区某积体电路公司之实际资料应用后,结果不但与最终估计良率之趋势吻合,且透过本研究之分解方法可以进一步找出造成异常的原因为何。 All industrial manufacturers ultimately strive to obtain maximum profits. For the integrated circuits (IC) manufacturer, the yield on each wafer is an important index to evaluate profit. During the complicated manufacturing process of a wafer, defects on the wafer surface are nearly impossible to avoid. Some defects permanently damage the chips, subsequently leading to yield loss. In addition, the extent of defect-clustering is also another important factor to affect yield loss. To enhance the yield of IC products, most manufacturers use control charts for their statistical process control (SPC) under controlling defects. Generally, the attribute control chart has been utilized to monitor the defect counts on a wafer. However, this control chart for defects may cause erroneous results without the consideration of the clustered defects. In this study, we present a novel means of constructing a Hotelling T2 control chart that can detect defects and defect-clustering simultaneously. A case study is also presented, demonstrating the effectiveness of the proposed control chart. 1.1 研究动机与目的 1 1.2 研究方法 2 1.3 研究范围与假设 2 1.4 研究架构 3 第二章 文献探讨 4 2.1 缺陷数管制图之探讨 4 2.1.1 传统积体电路制程缺陷数管制图的探讨 4 2.1.2 修正的缺陷数管制图 5 2.2 缺陷群聚现象之探讨 7 2.2.1 缺陷群聚现象 7 2.2.2 缺陷群聚严重程度的指标 8 2.3 HOTELLING T2多变量管制图 8 2.3.1 Hotelling T2多变量管制图之回顾 8 2.3.2 Hotelling T2多变量管制图之探讨 13 第三章 结合缺陷数与缺陷群聚的管制图之构建程序 14 第四章 实例验证 18 4.1 结合缺陷数与缺陷群聚的管制图之构建 18 4.2 管制图之验证 22 4.3 分析与比较 24 4.3.1 传统的缺陷数管制图 24 4.3.2 Albin与Friedman的缺陷数管制图 25 4.3.3 比较结果 26 第五章 结论 27 参考文献 28 |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT880031008 http://hdl.handle.net/11536/65166 |
显示于类别: | Thesis |