分碼多重進接通訊系統之盲目適應性解調器之積體電路設計

Abstract

直接序列分碼多重進接傳輸技術已被廣泛地討論並用於實際的無線通訊系統。當用戶間的展頻信號波形互相正交時或只有一個用戶的情形，使用匹配相關器(matched correlator)解調信號即能達到最佳化的效能。然而，在非同步系統中，用戶之間傳遞訊息的時序是非同步的，如此一來，正交性就不存在了。而且，離基地台近端的用戶通常具有較高的功率，會影響遠端用戶的信號接收，而產生遠近問題(Near-Far problem)，所以各種信號解調器紛紛被提出，用來偵測出正確的的信號。 在本論文中主要探討在多用戶干擾源(multiuser interference)與白色高斯白雜訊(AWGN)的影響下，以模式為基礎的Griffiths盲目適應性演算法則(model-based Griffiths’ adaptation algorithm. MBGA)檢測器的性能表現，並完成超大型積體電路的設計，經電路設計程式VERILOG及SYNOPSYS驗證結果，證明其功能正確無誤。

The direct-sequence code division multiple access (DS/CDMA) transmission technique has been widely investigated and used in practical wireless communication systems. When all the spreading waveforms are orthogonal or only one user exists, the optimal performance of reception can be achieved by using the matched correlator. However, the orthogonal property cannot be easily obtained due to random timing offsets between users in an asynchronous system. Furthermore, a nearby interfering user of large power will deteriorate the reception of the highly attenuated signal (Near-Far problem). Many detection algorithms have been proposed to solve this problem. In the thesis, model-based Griffiths’ adaptation algorithm (MBGA) demodulator with multiuser interference together with additive white Gaussian noise (AWGN) is investigated. The VLSI design of this kind of demodulation using 0.6um silicon process has been completed. The chip rate can be as high as 15M symbols/sec. ABSTRACT ii 誌謝 iii CONTENTS iv List of Figures vi Chapter 1 1 Introduction 1 Chapter2 5 DS-CDMA Systems Structures and Channel Characteristic 5 2.1 Multiple Access 5 2.2 Direct-Sequence Spread Spectrum 6 2.3 DS/CDMA Communication System [4] 7 2.4 Channel Model 9 2.5 MMSE Linear Detector 10 2.6 Training sequence Adaptation Algorithms 11 2.7 Blind Adaptation Algorithms 12 Chapter 3 19 DS/CDMA Demodulation Signals with Mismatch 19 3.1 Syncronization 19 3.2 Mismatch 20 3.3 Model-based Griffiths’ algorithm 23 Chapter 4 29 Computer simulation 29 4.1 Computer simulation for floating point 29 4.2 Quantization 30 4.3 Computer simulation with finite wordlength 32 Chapter 5 41 VLSI design of Model-based Griffiths’ algorithm demodulator 41 5.1 Top-down design flow 41 5.2 Verilog Simulations 42 5.3 synthesized result 43 Chapter 6 49 Conclusion 49 Bibliograghy 51