標題: 利用超高真空化學分子磊晶系統成長複晶矽鍺閘極的正型金氧半電晶體之製程研究
Fabrication and Characterization of P-Channel MOSFETs with Poly-SiGe Gate Grown by Ultra-High Vacuum Chemical Molecular Epitaxy System
作者: 陳坤明
Kun-Ming Chen
張俊彥
陳良波
Dr. Chun-Yen Chang
Dr. Liang-Po Chen
電子研究所
關鍵字: 複晶矽鍺;超高真空化學分子磊晶系統;成長率;金氧半電晶體;氮化矽/氧化矽;鈷;金屬矽化物;polycrystalline silicon-germanium;UHVCME;growth rate;MOSFET;nitride/oxide;cobalt;silicide
公開日期: 1999
摘要: 在本論文中,我們詳細地研究了利用超高真空化學分子磊晶系統進行複晶矽與矽鍺成長的機制。複晶矽與矽鍺的成長是利用Si2H6 及GeH4 作為其氣體源,並以氧化矽或氮化矽為實驗基板。實驗中觀察到複晶薄膜的成長速率與鍺含量,與基板材料無關,主要是受氣體源流量及基板溫度的影響。在鍺含量低時,薄膜的成長速率會隨鍺含量比例的增加而增加;在高鍺含量時,其速率反而隨鍺含量比的增加而減少。說明了複晶矽鍺的成長機制是不同於單晶矽鍺的成長;我們利用薄膜表面氫原子在不同鍺含量下的脫離速度,及氣體反應分子對矽與鍺具有不同的附著係數,來解釋複晶矽鍺的成長模式。另外,薄膜厚度之均勻度亦受鍺含量之影響,並隨鍺的加入而有顯著之改善,此現象可由複晶矽鍺與複晶矽比較下,具有較低的沈積活化能來解釋之。最後,由於氮化矽表面在薄膜成長初期,較氧化矽表面,具有更高的核化密度;因此,沈積在氮化矽基板上的複晶薄膜的表面平坦度,優於沈積於氧化矽之薄膜。 利用超高真空化學分子磊晶系統成長複晶矽鍺之技術,我們成功地製作了以矽鍺為閘極的正型金氧半電晶體,其中閘極氧化層表面在矽鍺成長前,先覆蓋一層薄氮化矽層,用以保護閘極氧化層在超高真空化學分子磊晶過程中,免於遭受反應氣體之破壞,同時可改善矽鍺表面的平坦度。 論文中,亦研究了鈷及複晶矽鍺間在不同鍺含量與退火溫度下的反應機制。由X光繞射儀分析得知,對鍺含量比例為9%的試片,在快速退火溫度範圍500度到800度之間,將形成Co(SiGe);在900度時則形成CoSi2。然而,對鍺含量比例為21%的試片,在快速退火溫度達900度時,仍然僅形成Co(SiGe),而無CoSi2的產生。這結果顯示了鍺原子會阻礙CoSi2的形成;因此,在鍺含量增加時,快速退火溫度必須提高以獲得較低的片電阻值。最後,根據此一矽化鈷製程研究,我們完成了具複晶矽鍺閘極的金氧半電晶體的自動對準金屬矽化物製程。
The polycrystalline silicon-germanium (poly-Si1-xGex) films have better properties than polycrystalline silicon (poly-Si) for device fabrications, such as lower proceeding temperature and process thermal budget. For these reasons, the poly-Si1-xGex films have been utilized for low-temperature thin film transistor fabrications and gate electrodes of metal-oxide-semiconductor field effect transistors (MOSFETs). In this work, disilane and germane were used to grow poly-Si1-xGex films at low temperature (<600oC) by cold-wall type ultra-high vacuum chemical molecular epitaxy (UHVCME) system. The poly-Si1-xGex films were deposited on oxide and nitride surfaces. The Ge fraction x was evaluated from X-ray diffraction (XRD), it is observed that the Ge fraction increases with the increase of the GeH4 flow rate. The result is only slightly related to the substrate type. The growth rate increases with the Ge fraction at lower values and then decreases with the Ge fraction in the higher composition range. This implies that the growth mechanism of poly-Si1-xGex films is different from that of single-crystalline Si1-xGex on Si. The uniformity of poly-Si1-xGex films depends on the Ge fraction, and it is improved by the addition of germanium. The result can be explained by the lower activation energy (< 0.25 eV) of poly-Si1-xGex deposition as compared to that of poly-Si (~2.1eV). In addition, the surface of poly-Si1-xGex film on nitride substrate is smoother than that on oxide substrate, and is suitable for the gate-electrode material of MOSFET. The shorter incubation time and smoother surface on nitride-coated substrate can be explained by the higher nucleation density on nitride surface at initial growth period. The p-channel MOSFETs with heavily doped p-type poly-Si1-xGex gate grown in UHVCME system have been successfully fabricated. The gate oxide layer capped with a thin nitride layer was used to prevent the damage of gate oxide from UHVCME deposition process. The fabricated MOSFETs exhibit well-behaved characteristics. The effects of Ge on the interfacial reaction between Co and poly-Si1-xGex materials were also studied. Poly-Si1-xGex layers prepared at 580oC by UHVCME system were subjected to Co silicidation at various rapid thermal annealing (RTA) temperatures ranging from 500oC to 900oC. From XRD, Co(Si1-yGey) cubic structure was formed with RTA temperature ranging from 500oC to 800oC for x = 0.09, while CoSi2 was formed at 900oC. However, for x = 0.21, Co(Si1-yGey) persisted even after 900oC RTA annealing, and CoSi2 was not found. These results indicate that Ge atoms retard the formation of CoSi2. As a result, the RTA temperature needed to obtain low sheet resistance has to be increased with increasing Ge content. Finally, p-channel MOSFETs with poly-Si1-xGex gates have been successfully integrated with Co salicidation process. Abstract ( in English ) iii Acknowledgment ( in Chinese ) v Contents vi Table Captions viii Figure Captions ix Chapter 1 Introduction 1 1-1 General Background and Motivation 1 1-1-1 Poly-Si1-xGex Film 1 1-1-2 Poly-Si1-xGex Gated MOSFET 3 1-2 Outline of this Thesis 5 1-3 References 7 Chapter 2 Deposition of Polycrystalline Si and Si1-xGex Films by Ultra-High Vacuum Chemical Molecular Epitaxy System 13 2-1 Introduction 13 2-2 Experiments 14 2-3 Results and Discussion 15 2-3-1 Ge content 15 2-3-2 Incubation Time 16 2-3-3 Deposition Rate 17 2-4 Conclusions 19 2-5 References 20 Chapter 3 Structural and Electrical Properties of Polycrystalline Si and Si1-xGex Films on SiO2 and Si3N4 33 3-1 Introduction 33 3-2 Experiments 34 3-3 Results and Discussion 35 3-3-1 Uniformity of Film Thickness and Ge content 35 3-3-2 Surface Roughness 36 3-3-3 Electrical Properties 38 3-4 Conclusions 39 3-5 References 40 Chapter 4 Fabrication and Characterization of Poly-Si1-xGex Gated P-Channel MOSFETs 57 4-1 Introduction 57 4-2 Theory of Poly-Si1-xGex Gated MOSFETs 58 4-3 Fabrication Process 59 4-4 Results and Discussion 59 4-5 Conclusions 62 4-6 References 63 Chapter 5 The Reaction of Co and Si1-xGex for MOSFET with Poly-Si1-xGex Gate 76 5-1 Introduction 76 5-2 Experiments 77 5-3 Results and Discussion 78 5-4 Conclusions 82 5-5 References 83 Chapter 6 Conclusions and Future Work 93 6-1 Conclusions 93 6-2 Suggestion for Future Work 95
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT880428128
http://hdl.handle.net/11536/65773
Appears in Collections:Thesis