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dc.contributor.author徐鑫洲en_US
dc.contributor.authorShin-Chou Hsuen_US
dc.contributor.author張隆國en_US
dc.contributor.authorDr. Lon-Kou Changen_US
dc.date.accessioned2014-12-12T02:24:08Z-
dc.date.available2014-12-12T02:24:08Z-
dc.date.issued1999en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT880591026en_US
dc.identifier.urihttp://hdl.handle.net/11536/66256-
dc.description.abstract半導體工業技術不斷進步,在外形上IC構裝力求短、小、輕,在功能上則力求強大且高速,因而I/O腳數密度急速增加。然而隨著IC腳位的大幅增加,造成構裝線與線之間的彼此間距離越來越近,加上工作頻率越來越高,其相互之間的干擾也越來越嚴重,這些都是高密度IC構裝發展的障礙。雖然如此,高頻、高腳位數仍是構裝的目標。尤其是1990年代發展出來的BGA(ball grid array),其腳位數可高達512甚至邁入1024點,構裝已需高電性品質的的設計。 本論文即是在藉著模擬分析建立出一系列的構裝電性的快速估算法。本文選擇BGA構裝為分析對象,利用電磁分析軟體(Ansoft)來加以輔助,以此建立各種模擬範例,藉著理論的探討,加上模擬分析的支援,整理出所有對信號傳輸頻寬、頻譜及串音(cross talk)有影響的變因,以及它們之間的關係,同樣的理論探討和分析也做在傳輸信號的振鈴上。我們藉著所建立的模擬範例的幫助,尋求線間的串音、地線、電源線、接地面(ground plane)和雜訊強度的關係,尋求構裝方式與電性品質的關係,以期未來能協助改善BGA等高密度構裝技術的發展。zh_TW
dc.description.abstractAs the semiconductor techniques have progressed rapidly, the IC packaging tech-niques are also improved simultaneously. Small-and-light IC packages and strong-and-fast functions are always the design and fabrication goals. Therefore, the required I/O pin number increases greatly. The signal transmission quality and noise between con-ductors becomes more serious. All these problems are resulted from the short distance between conductors and also from the operation in high frequency. Nevertheless, high operating frequency and large pin number are still unavoidably needed in the package industry, especially to the BGA (ball grid array) packages, which are the products in 1990s. The pin number is as high as 512 and even toward 1024. In this thesis we simulate and analyze the electricity of IC substrate and to propose a corresponding efficient evaluation method. We choose the substrate layout of the BGA package as our studying object and use Ansoft for the simulation and analysis tools to produce simulation models which are used to obtain the relationship of the configurations of packages with respect to the bandwidth, the frequency response, and the crosstalk. Furthermore, we also study how the relationship above affects on the signal bouncing (or ringing ) . These models will also be used in finding and analyzing the problems caused by the signal crosstalk, the noises induced in the power lines, and ground plane. We seek the relationship between the package configurations and the signal transmission quality. Our object is to develop the techniques and the best design rules to support the BGA packages design in the near future. 英文摘要 ii 誌謝 iii 目錄 iv 圖例 vii 第一章 緒論 1 1.1 研究背景與動機 1 1.2 研究目的 5 1.3 論文架構 5 第二章 封裝之電性問題 7 2.1 電阻效應 8 2.2 電感 9 2.3 電容 11 2.4 RC延遲 12 2.5 信號線損失和肌膚效應 13 2.6 電偶雜訊和串音干擾 15 2.7 電源與接地 15 2.8 傳輸線 18 2.9 傳輸線的終端反射 22 2.10 Latch-up的發生 25 第三章 主要模擬技術的建立 28 3.1 訊號地面的單一傳輸線特性 28 3.1.1 以線長做變因 29 3.1.2 以線寬做變因 34 3.1.3 以佈線轉折角度為變因 37 3.2 導線之間的相互影響 42 3.2.1 線距對串音的影響 42 3.2.2 上升時間的改變對串音的影響 46 3.2.3 導線與地線之關係 47 3.2.4 地線安置之討論 48 3.2.5 以角度做變因 51 3.3 分層模擬技術之建立 53 3.3.1 四層IC封裝延伸板之討論 54 3.3.2 分層模擬 57 3.4 單一導線含via與錫球之特性 60 3.5 方波信號的上升時間對封裝電性之影響 62 3.6 遠端阻抗為變因 65 3.7 阻抗的最佳配置 68 第四章 個案分析 77 4.1 二層板之個案 77 4.2 四層板之個案 84 第五章 模擬結果與討論 91 5.1 訊號地面的單一傳輸線特性討論 91 5.2 個案討論 98 5.2.1 二層板個案 98 3.2.2 四層板個案 100 第六章 結論與未來展望 101 6.1 結論 101 6.2 未來展望 101 附錄A 傳輸線之RLC分析 103 附錄B 導線間RLC分析比較 112 附錄C 有無錫球之傳輸線RLC表 114 參考文獻 115en_US
dc.language.isozh_TWen_US
dc.subject基板zh_TW
dc.subject頻寬zh_TW
dc.subject串音zh_TW
dc.subject信號振鈴zh_TW
dc.subjectSubstrateen_US
dc.subjectBandwidthen_US
dc.subjectCrosstalken_US
dc.subjectSignal Ringen_US
dc.titleIC封裝基板導線之傳輸電性分析zh_TW
dc.titleThe Electrical Analysis of the Conductors on an IC Package Substrateen_US
dc.typeThesisen_US
dc.contributor.department電控工程研究所zh_TW
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