真實亂數產生器之設計

Abstract

伴隨著網際網路與電子商務的快速發展，資訊傳遞的安全性越來越受到重視。利用加密、解密的方法，可以確保資訊的安全性。在加解密系統中，需要利用亂數來產生金匙與部分參數的初始值，然而利用數位電路或軟體製作的亂數產生器，所產生的亂數是週期性可預測的，缺乏安全性，利用類比電路製作的亂數產生器，才能產生無法預測、無週期性以及在統計上機率均等的真實亂數，以確保安全性。在國外研發的亂數產生器成果中，有架構太複雜或是製作不易達成等缺點，有鑑於此，本論文利用簡單的切換電容電路實現混亂離散時間系統，設計出真實亂數產生器，達到簡單架構、低成本、低功率以及產生真正亂數等目標，並依現今系統單晶片的趨勢，搭配設計微控制器，形成一適合於加解密應用上的系統。

As Internet and E-commerce become popular today, it’s more and more important to secure transmitted information. We can secure information by using encryption and decryption. In cryptographic system we need random numbers to generate keys and some initial values of system. However, random numbers generated by a random generator are periodic and predictable if we use digital circuits and software to make a random generator. It lacks security. By using analog circuits to make a random generator we can get true random numbers which are aperiodic, unpredictable and statistically random. In some true random generator researches, the architecture is too complex or it’s too hard to make. Therefore, this thesis uses simple switched-capacitor circuit to implement chaotic discrete-time system. This true random generator design achieves simple architecture, low cost, low power and true random number generation. According to the trend of System On a Chip（SOC）, we also design micro-controller and construct a cryptographic system.