氮化矽記憶元件可靠性量測與分析

Abstract

本篇論文主要著重於特殊類型SONOS快閃式記憶元件之可靠性議題。其中包括重複寫入/抹除之耐久性、寫入狀態之資料保存、抹除狀態之臨界電壓漂移、讀取時之元件擾動。而在此研究中，特殊SONOS元件為一n型通道MOSFET加一ONO閘極而構成。與傳統SONOS不同之處在於，此特殊元件有著較厚之底部氧化層，可避免電荷直接穿隧逸失，且操作方式可分別藉由熱電子寫入（hot electron program）與熱電洞抹除（band-to-band hot hole erase）。 關於可靠性議題方面，臨界電壓準位皆隨著寫入/抹除次數的增加而向上揚升。此重複寫入抹除之耐久性機制，將在此被探討。此外，抹除狀態資料遺失也被觀測到。首先，在一經過多次寫入抹除元件中，抹除狀態之臨界電壓會隨著儲存時間而漂移。此漂移與溫度呈現弱相關。臨界電壓漂移與時間的相依性，可用穿隧波前模型來做完整的描述。此外，在兩位元操作下，有著明顯的讀取擾動效應。而一正電性之氧化層電荷導致通道電子注入之解析模型，被用來闡明此讀取擾動特性。氮化矽層電荷透過氧化層缺陷導致穿隧而造成之資料遺失，在此也被描述。Frenkel-Poole散失為此最主要的機制。

This thesis will focus on the reliability issues of a special type SONOS flash EEPROM cells, which include program/erase cycling endurance, program-state charge retention loss, erase-state threshold voltage drift, and read-disturb. In this study, the SONOS cell is made of a n-channel MOSFET with an oxide-nitride-oxide gate structure. Unlike conventional SONOS cells, this cell has a relatively thick bottom oxide to avoid charge direct tunneling and is operated by means of channel hot electron program and band-to-band hot hole erase, respectively. With respect to the cell reliability, the threshold voltage window may shift upward as P/E cycle number increases. The mechanism for this cycling endurance issue will be investigated. In addition, erase-state data loss is explored. First, an erase-state threshold drift with storage time is observed in a P/E cycled cell. This drift has insignificant temperature dependence. The temporal evolution of the threshold voltage drift can be well described by the tunneling front model. Furthermore, significant read-disturb effect is noticed in two-bit operation. An analytical model based on positive oxide charge assisted channel hot electron injection has been developed to explain the read-disturb behavior. Program-state retention loss due to nitride charge escape via oxide trap assisted tunneling is also characterized. Frenkel-Poole emission is found to be the dominant mechanism.