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dc.contributor.author張延安en_US
dc.contributor.authorYen-An Changen_US
dc.contributor.author雷添福en_US
dc.contributor.authorTan-Fu Leien_US
dc.date.accessioned2014-12-12T02:25:33Z-
dc.date.available2014-12-12T02:25:33Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890428109en_US
dc.identifier.urihttp://hdl.handle.net/11536/67185-
dc.description.abstract在本論文中,我們提出一個新的垂直結構的觀念,亦即元件的有效通道長度決定於複晶矽薄膜的厚度,而不受微影曝光技術的限制,進而取代之。是故,著手進行垂直結構上氧化層的品質研究是刻不容緩的。為此,我們分別用熱氧化製程以及電漿化學輔助氣象沈積系統(PECVD)製作薄氧化層於垂直結構的複晶矽薄膜上,並加入犧牲氧化製程,藉以多方分析此一垂直式複晶矽氧化層之電特性。此外,我們進一步地比較不同的氧化製程,期能找出製作高品質垂直氧化層的最佳條件。結果顯示,經由犧牲氧化法的處理,能有效地改善因活性離子蝕刻對垂直複晶矽薄膜表面造成的傷害及移除蝕刻後殘留的雜質。我們更發現在製作垂直氧化薄膜前預先以犧牲氧化法處理,可大幅提高氧化層的崩潰電荷密度。雖然犧牲氧化法會引起熱氧化薄膜表面粗糙化,仍不失其改善電特性之功效。比較不同的氧化製程,我們發現以PECVD TEOS搭配犧牲氧化法,可製作出電特性對稱且品質絕佳的垂直氧化薄膜。 因此,在沈積TEOS氧化層之前經由犧牲氧化法的處理,我們將可得到媲美傳統平面式複晶矽氧化層的垂直式複晶矽薄氧化層,並可進一步地應用於未來超大型積體電路元件的製程。zh_TW
dc.description.abstractIn this thesis, we propose a novel vertical structure concept, which the channel length is controlled by thickness of polysilicon films instead of the photolithographic limitation. Hence, the investigation of thin gate oxide quality on vertical structure is very important. In our study, we form the oxide on the vertical structure by thermal oxidation and PECVD TEOS deposition and investigate the effect of sacrificial oxidation process on the electrical properties of the vertical polyoxide. Besides, we studied the differences between different oxide formation methods, and found a best solution to form an excellent vertical oxide. We find that sacrificial process can remove the RIE-induced damages and impurities on the vertical polysilicon surface. Although sacrificial oxidation causes the enhanced surface roughness for thermal oxides, we can obtain high oxide charge to breakdown by pre-sacrificial process. Moreover, for PE-TEOS oxides with pre-sacrificial treatment, they have symmetric and better electrical characteristics than thermal oxides. As a result, the PECVD TEOS vertical polyoxide with pre-sacrificial process have good performance that can compare with traditional planar polyoxides. This oxide is suitable to be applied in future ULSI devices fabrication.en_US
dc.language.isozh_TWen_US
dc.subject垂直結構zh_TW
dc.subject複晶矽zh_TW
dc.subject犧牲氧化製程zh_TW
dc.subject崩潰電荷密度zh_TW
dc.subjectvertical structureen_US
dc.subjectpolysiliconen_US
dc.subjectsacrificial oxidation processen_US
dc.subjectcharge to breakdownen_US
dc.title垂直式結構複晶矽氧化層之研究zh_TW
dc.titleThe Study of Polysilicon Oxide in Vertical Structureen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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